Abstract: A power-saving method for an HDMI device is provided. The method includes detecting color depth information of video data from an HDMI source which is connected to the HDMI port, deriving a horizontal length for each line by fragment of a picture frame according to the color depth information, generating a plurality of synchronization signals according to the horizontal length for each line by fragment, and powering on the HDMI port, according to the synchronization signals, for a predetermined time period to obtain encrypted information from the HDMI source, and powering off the HDMI port after the predetermined time period.

Abstract: A semiconductor device and a package structure are provided. The semiconductor device includes a substrate, a light-emitting structure, a first semiconductor layer, a second semiconductor layer and a first electrode. The light-emitting structure is on the substrate. The first semiconductor layer is on the light-emitting structure. The second semiconductor layer is between the first semiconductor layer and the light-emitting structure. The first electrode is on the second semiconductor layer. At least a portion of the first electrode is separated from the first semiconductor layer.

Abstract: A semiconductor device and a package structure are provided. The semiconductor device includes a substrate, a light-emitting structure, a first semiconductor layer, a second semiconductor layer and a first electrode. The light-emitting structure is on the substrate. The first semiconductor layer is on the light-emitting structure. The second semiconductor layer is between the first semiconductor layer and the light-emitting structure. The first electrode is on the second semiconductor layer. At least a portion of the first electrode is separated from the first semiconductor layer.

Abstract: A notch filter appropriately adjusts the amount of attenuation at a center frequency of its notch band through changing or adjusting a value of an adjustable parameter A, and adaptively controls the amount of signal attenuation of a predetermined frequency component for an input signal that passes the notch filter, so as to partially suppress or partially attenuates the predetermined frequency component without affecting the size of a bandwidth of the notch filter.

Abstract: An apparatus for estimating a carrier frequency offset (CFO) is provided. A differential correlation calculation is performed on a received signal and a reference signal to generate multiple calculation results. One among M number of peak values with largest amplitudes determined from the calculation results is selected as a candidate peak value and outputted each time. A data capturing circuit captures from the received signal a data segment corresponding to the candidate peak value as a candidate data segment. A fast Fourier transform (FFT) circuit performs FFT on a product of the candidate data segment and a conjugate signal of reference data to obtain a candidate transform result. A selecting circuit determines whether to select the candidate transform result as a target transform result. The CFO calculating circuit determines an estimated CFO according to a frequency corresponding to the largest amplitude in the target transform result.

Abstract: A circuit applied to a display apparatus includes a first noise variance estimation circuit, an impulsive interference determination circuit, a second noise variance circuit and a selection circuit. The first noise variance estimation circuit calculates a first noise variance of an input signal. The impulsive interference determination circuit determines whether the input signal has impulsive interference according to the first noise variance to generate a detection result. The second noise variance estimation circuit calculates a second noise variance based on the input signal. The selection circuit selectively outputs one of the first noise variance and the second noise variance according to the detection result.

Abstract: A phase recovery device includes a phase recovery module and a residual phase recovery module. The phase recovery module performs a first-stage phase recovery on a received signal to generate a first phase recovered signal. The residual phase recovery module performs a second-stage phase recovery on the first phase-recovered signal to generate a second phase recovered signal.

Abstract: A channel estimation circuit includes a pilot buffer, an interference indication buffer and a channel information calculation circuit. The pilot buffer stores channel information of multiple pilot cells in multiple symbols. The interference indication buffer stores interference indication information, which indicates whether the multiple symbols are affected by interference. The channel information calculation circuit, coupled to the pilot buffer and the interference indication buffer, estimates, based on channel information of a part of the multiple pilot cells in the multiple symbols, channel information of a data cell in the multiple symbols according to the interference indication information. The part of the multiple pilot cells do not include pilot cells of any symbol affected by interference.

Abstract: A signal processing apparatus includes an oscillation circuit, an interpolation circuit, a matching filter, a high-pass filter and a timing recovery circuit. The oscillation circuit generates a clock signal. The interpolation circuit performs interpolation on an input signal according to the clock signal to generate an interpolation sample result. The matching filter demodulates the interpolation sample result to generate an output signal. The high-pass filter performs high-pass filtering on the interpolation sample result to generate a filtered result. The timing recovery circuit receives the filtered result, and performs timing recovery according to the filtered result.

Abstract: A circuit applied to a display apparatus includes an analog-to-digital converter (ADC), a filter and impulsive interference detecting circuit. The ADC converts an analog input signal to a digital input signal. The filter filters out adjacent-channel interference (ACI) of the digital input signal to generate a filtered digital input signal. The impulsive interference detecting circuit detects a noise intensity of a part of a frequency range of the filtered digital input signal to generate a detection result. The part of the frequency range is smaller than a frequency band of the filter, and the detection result is used to determine whether the analog input signal has impulsive interference.

Abstract: A circuit applied to a receiver in a display apparatus includes a noise detecting circuit and a threshold determining circuit. The noise detecting circuit detects noise of a received signal to generate a plurality of noise intensity values. The threshold determining circuit determines a threshold according to the plurality of noise intensity values to accordingly determine whether the received signal has impulsive interference. The noise determining circuit includes a sorting circuit and a selecting circuit. The sorting circuit sorts an order of the plurality of noise intensity values. The selecting circuit selects, from the plurality of noise intensity values, the Mth noise intensity value as a predetermined noise intensity value. The threshold determining circuit determines the threshold according to the predetermined noise intensity value.

Abstract: A method for detecting a notch band is applied to a multicarrier communication system that operates in a wideband. The method includes: receiving a received signal, and generating a plurality of frequency-domain signals according to the received signal; performing a magnitude operation on the frequency-domain signals to obtain a plurality of magnitude values; determining a plurality of ratios of a first magnitude set among the magnitude values to a second magnitude set among the magnitude value to determine whether the received signal contains a notch band.

Abstract: An echo cancellation circuit is provided to reduce or eliminate the effects of a pre-echo signal that is part of a received multi-path signal. The circuit includes: a delay module, receiving an input signal and delaying the input signal to generate a plurality of delayed signals; a multiplication module, multiplying the plurality of delayed signals by a plurality of coefficients to generate a plurality of multiplication results, respectively; a summing circuit, performing a summation on the plurality of multiplication results to generate a summation signal; a subtraction circuit, receiving a first delay signal and generating a subtracted signal according to the first delayed signal and the summation signal; and a coefficient calculating circuit, calculating the plurality of coefficients according to the subtracted signal. The echo cancellation circuit outputs an output signal as the subtracted signal, with the pre-echo signal diminished or eliminated.

Abstract: A carrier frequency offset (CFO) tracking circuit includes: a CFO estimation circuit, generating an estimated CFO signal; a loop filter, coupled to the CFO estimation circuit, performing a loop filter operation on the estimated CFO signal according to an initial value to generate a loop filtered result; and an averaging circuit, coupled to the CFO estimation circuit and the loop filter, performing an average operation on the estimated CFO signal to generate the initial value as an average of the estimated CFO signal.

Abstract: A circuit applied to a display apparatus includes a front-end circuit, a conversion circuit and an impulsive interference detection circuit. The front-end circuit converts an analog input signal into a digital input signal. The conversion circuit, coupled to the front-end circuit, converts the digital input signal from a time domain to a frequency domain to generate a frequency-domain signal. The impulsive interference detection circuit, coupled to the conversion circuit, detects a noise intensity of the frequency-domain signal to generate a detection result, which is used to determine whether the analog input signal has impulsive interference.

Abstract: A circuit applied to a display apparatus includes a front-end circuit, a conversion circuit and an impulsive interference detection circuit. The front-end circuit converts an analog input signal into a digital input signal. The conversion circuit, coupled to the front-end circuit, converts the digital input signal from a time domain to a frequency domain to generate a frequency-domain signal. The impulsive interference detection circuit, coupled to the conversion circuit, detects a noise intensity of the frequency-domain signal to generate a detection result, which is used to determine whether the analog input signal has impulsive interference.

Abstract: An echo detection circuit for a multi-carrier system includes a memory, a threshold generating circuit and an echo determining circuit. The memory stores a plurality of channel impulse response values of the multi-channel system. The channel impulse response values include a target channel impulse response value, a plurality of preceding channel impulse response values and a plurality of subsequent channel impulse response values; a threshold generating circuit, coupled to the memory, generating a threshold corresponding to the target channel impulse response according to the preceding channel impulse response values and the subsequent channel impulse response values; and an echo determining circuit, coupled to the threshold generating circuit and the memory, comparing the target channel impulse response value with the threshold to determine whether the target channel impulse response value corresponds to an echo path of the multi-carrier system.

Abstract: A carrier frequency offset (CFO) tracking circuit includes: a CFO estimation circuit, generating an estimated CFO signal; a loop filter, coupled to the CFO estimation circuit, performing a loop filter operation on the estimated CFO signal according to an initial value to generate a loop filtered result; and an averaging circuit, coupled to the CFO estimation circuit and the loop filter, performing an average operation on the estimated CFO signal to generate the initial value as an average of the estimated CFO signal.

Abstract: A time-domain equalizer includes a delay circuit, a weighting circuit, a controller and a summation circuit. The delay circuit receives an equalized signal and accordingly generates M delayed signals for an equalized signal. The weighting circuit applies an mth weighting of M weightings to an mth delayed signal of the M delayed signals to generate an mth weighted signal. The summation circuit sums up the M weighted signals, according to which the equalized signal is updated. The controller iteratively updates the M weightings according to a vector {right arrow over (e)}n,p=[en,p,1 . . . en,p,M], where the symbol en,p,j is defined as en,p,j=?k(z[k]*z[k?Dp,j]*), the symbol n is an iteration index, k is a sample index, z[k] is a kth sample of the equalized signal, j is an integer index between 1 and M, and Dp,j represents a time delay amount corresponding to a jth delayed signal of the M delayed signals.

Abstract: A notch filter appropriately adjusts the amount of attenuation at a center frequency of its notch band through changing or adjusting a value of an adjustable parameter A, and adaptively controls the amount of signal attenuation of a predetermined frequency component for an input signal that passes the notch filter, so as to partially suppress or partially attenuates the predetermined frequency component without affecting the size of a bandwidth of the notch filter.