Patents by Inventor Koan-Yel Jeong

Koan-Yel Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6559683
    Abstract: A bi-directional high-voltage RESURF EDMOS (REduced SURface Extended Drain MOS) transistor which can endure a high voltage at its source by providing drift regions at both sides, i.e., the source and drain of the conventional RESURF LDMOS (Lateral DMOS) transistor, and exchanging the drain and the source when an analog signal of high voltage is inputted. Further, the bi-directional high-voltage RESURF EDMOS transistor provides a high-voltage analog multiplexer circuit employing a RESURF EDMOS transistor which is capable of reducing the number of necessary high-voltage elements and performing a stable operation, by constructing a high-voltage analog multiplexer having at least three inputs and a multistage high-voltage multiplexer circuit of push-pull type, pass transistor type, and combined form of push-pull type and pass transistor type by using the bi-directional high-voltage, RESURF EDMOS transistor.
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: May 6, 2003
    Assignee: Hyundai Electronics Industries, Co., Ltd.
    Inventors: Oh-Kyong Kwon, Koan-Yel Jeong
  • Patent number: 6160289
    Abstract: A bi-directional high-voltage RESURF EDMOS (REduced SURface Extended Drain MOS) transistor which can endure a high voltage at its source by providing drift regions at both sides, i.e., the source and drain of the conventional RESURF LDMOS (Lateral DMOS) transistor, and exchanging the drain and the source when an analog signal of high voltage is inputted. Further, the bi-directional high-voltage RESURF EDMOS transistor provides a high-voltage analog multiplexer circuit employing a RESURF EDMOS transistor which is capable of reducing the number of necessary high-voltage elements and performing a stable operation, by constructing a high-voltage analog multiplexer having at least three inputs and a multistage high-voltage multiplexer circuit of push-pull type, pass transistor type, and combined form of push-pull type and pass transistor type by using the bi-directional high-voltage RESURF EDMOS transistor.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: December 12, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Oh-Kyong Kwon, Koan-Yel Jeong
  • Patent number: 5854566
    Abstract: A bi-directional high-voltage RESURF EDMOS (REduced SURface Extended Drain MOS) transistor which can endure a high voltage at its source by providing drift regions at both sides, i.e., the source and drain of the conventional RESURF LDMOS (Lateral DMOS) transistor, and exchanging the drain and the source when an analog signal of high voltage is inputted. Further, the bi-directional high-voltage RESURF EDMOS transistor provides a high-voltage analog multiplexer circuit employing a RESURF EDMOS transistor which is capable of reducing the number of necessary high-voltage elements and performing a stable operation, by constructing a high-voltage analog multiplexer having at least three inputs and a multistage high-voltage multiplexer circuit of push-pull type, pass transistor type, and combined form of push-pull type and pass transistor type by using the bi-directional high-voltage RESURF EDMOS transistor.
    Type: Grant
    Filed: January 19, 1996
    Date of Patent: December 29, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventors: Oh-Kyong Kwon, Koan-Yel Jeong
  • Patent number: 5835169
    Abstract: In an LCD device of a thin film transistor which includes a thin film transistor having as a switching device gate electrode to which a driving voltage is applied and source/drain electrodes in which a channel is formed and thereby turned on when the driving voltage is applied to the gate electrode and has a data line spaced from the source electrode by a predetermined interval to be insulated therefrom and connected with the drain electrode, by interposing a storage electrode covering the data line and the gate line, located at a lower portion of a pixel electrode and formed of a conductive material capable of cutting off a light between the data line and a pixel electrode and between a gate line and the pixel electrode, the storage electrode cuts off the data line and the pixel electrode, and the gate line and the pixel electrode to minimize a parasitic capacitance generated therebetween, and accordingly, to prevent a cross talk caused by the parasitic capacitance, and thereby an aperture is increased witho
    Type: Grant
    Filed: December 5, 1996
    Date of Patent: November 10, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventors: Oh-Kyong Kwon, Koan-Yel Jeong