Abstract: A circuit, system, and method for measuring capacitance are described. A current may be received at an input of a conversion circuit. The current may be converted to a voltage signal which may be used to create a negative feedback current to the input of the conversion circuit and which may be demodulated digitally to provide a static digital output representative of a capacitance.

Abstract: In one embodiment, a shunt resistor is provided, comprising two terminals, a semiconductor substrate embodying at least one temperature sensor comprising at least a temperature sensitive element comprising at least one pn-junction, and at least two metal layers above the semiconductor substrate, at least the upper of the metal layer comprising a path that electrically connects the two terminals, whereby the temperature sensor is below and within the periphery of the upper metal layer.

Abstract: In one embodiment, a shunt resistor is provided, comprising two terminals, a semiconductor substrate embodying at least one temperature sensor comprising at least a temperature sensitive element comprising at least one pn-junction, and at least two metal layers above the semiconductor substrate, at least the upper of the metal layer comprising a path that electrically connects the two terminals, whereby the temperature sensor is below and within the periphery of the upper metal layer.

Abstract: A phase-domain delta-sigma (??) modulator in a phase digitizer determines a demodulated phase error based on a phase-modulated frequency signal, in which a carrier frequency is modulated with a fundamental frequency and an associated phase, and a selected one of a set of reference signals, where the demodulated phase error represents a difference between the phase and a reference phase of the selected one of the set of reference signals. Moreover, a digital filter in the phase-domain ?? modulator filters the demodulated phase error. Furthermore, a latch in the phase-domain ?? modulator provides a bit stream by sampling one or more bits of the filtered demodulated phase error, where an average value of the bit stream represents the phase. Next, control logic in the phase-domain ?? modulator selects the one of the set of reference signals.

Abstract: A phase-domain delta-sigma (??) modulator in a phase digitizer determines a demodulated phase error based on a phase-modulated frequency signal, in which a carrier frequency is modulated with a fundamental frequency and an associated phase, and a selected one of a set of reference signals, where the demodulated phase error represents a difference between the phase and a reference phase of the selected one of the set of reference signals. Moreover, a digital filter in the phase-domain ?? modulator filters the demodulated phase error. Furthermore, a latch in the phase-domain ?? modulator provides a bit stream by sampling one or more bits of the filtered demodulated phase error, where an average value of the bit stream represents the phase. Next, control logic in the phase-domain ?? modulator selects the one of the set of reference signals.

Abstract: An analog-to-digital converter (ADC) is described. This ADC converts an analog signal into a digital value using a two-pass digitization process. In a first operation, coarse digitization is performed by an averaging converter based on a set of references. Then, in a second operation, fine digitization is performed by either another averaging converter or the same averaging converter based on a subset of the set of references that is progressively closer to an instantaneous value of the analog signal. For example, the coarse digitization may be performed by a low-resolution ADC stage and the fine digitization may be performed by a sigma-delta ADC, such as a single-bit sigma-delta ADC. Moreover, the other averaging converter may use dynamic element matching to shuffle reference elements used to generate the subset. In this way, the ADC may provide high resolution with reduced nonlinearity and quantization noise.

Abstract: During operation of the device, a drive circuit may provide a drive signal having a fundamental frequency to two electrothermal filters (ETFs) having different temperature-dependent time constants. In response to the drive signal, the two ETFs may provide signals having the fundamental frequency and phases relative to the drive signal corresponding, respectively, to the time constants of the ETFs. Then, phase-shift values of the phases may be measured using a phase detector, and a signal may be output based on the phase-shift values. Note that the signal may correspond to a value that is a function of a temperature of the device.

Abstract: An analog-to-digital converter (ADC) is described. This ADC converts an analog signal into a digital value using a two-pass digitization process. In a first operation, coarse digitization is performed by an averaging converter based on a set of references. Then, in a second operation, fine digitization is performed by either another averaging converter or the same averaging converter based on a subset of the set of references that is progressively closer to an instantaneous value of the analog signal. For example, the coarse digitization may be performed by a low-resolution ADC stage and the fine digitization may be performed by a sigma-delta ADC, such as a single-bit sigma-delta ADC. Moreover, the other averaging converter may use dynamic element matching to shuffle reference elements used to generate the subset. In this way, the ADC may provide high resolution with reduced nonlinearity and quantization noise.

Abstract: During operation of the device, a drive circuit may provide a drive signal having a fundamental frequency to two electrothermal filters (ETFs) having different temperature-dependent time constants. In response to the drive signal, the two ETFs may provide, signals having the fundamental frequency and phases relative to the drive signal corresponding, respectively, to the time constants of the ETFs. Then, phase-shift values of the phases may be measured using a phase detector, and a signal may be output based on the phase-shift values. Note that the signal may correspond to a value that is a function of a temperature of the device.

Abstract: An electrothermal frequency-locked loop (EFLL) circuit is described. This EFLL circuit includes an oscillator in a feedback loop. A drive circuit in the EFLL circuit generates a first signal having a fundamental frequency, and an electrothermal filter (ETF) in the EFLL circuit provides a second signal based on the first signal. This second signal has the fundamental frequency and a phase (relative to the first signal) that corresponds to a temperature-dependent time constant of the ETF. Moreover, a sensing component in the EFLL circuit determines a parameter associated with a temperature of the ETF. For example, the parameter may be the temperature or may be other than the temperature, such as the fundamental frequency and/or the phase of the second signal.

Abstract: Current-feedback instrumentation amplifiers that include dynamic element matching for the input transconductance amplifiers by periodically swapping the transconductance amplifiers between the instrumentation amplifier input and the feedback input. The instrumentation amplifiers may include a gain error reduction loop, which loop corrects differences in the gains of the input transconductance amplifiers and eliminates the ripple in the instrumentation amplifier output caused by the dynamic element matching. If chopper stabilization is used, the amplifiers may also include an offset reduction loop. Various embodiments are disclosed.

Abstract: Ripple reduction loop for chopper amplifiers and chopper-stabilized amplifiers. The ripple reduction loop includes a first chopper, a first amplifier having an input coupled to an output of the first chopper, a second chopper having an input coupled to an output of the first amplifier, a second amplifier having an input coupled to an output of the second chopper, a third chopper, an output of the second amplifier having its output capacitively coupled to an input of the third chopper as the only input to the third chopper, a third amplifier coupled as an integrator having an input coupled to an output of the third chopper, an output of the integrator being coupled to combine with the output of the first amplifier as the input of the second chopper, and at least one Miller capacitor coupled between an output of the second amplifier and the input of the second amplifier. Various embodiments are disclosed.

Abstract: An electrothermal frequency-locked loop (EFLL) circuit is described. This EFLL circuit includes an oscillator in a feedback loop. A drive circuit in the EFLL circuit generates a first signal having a fundamental frequency, and an electrothermal filter (ETF) in the EFLL circuit provides a second signal based on the first signal. This second signal has the fundamental frequency and a phase (relative to the first signal) that corresponds to a temperature-dependent time constant of the ETF. Moreover, a sensing component in the EFLL circuit determines a parameter associated with a temperature of the ETF. For example, the parameter may be the temperature or may be other than the temperature, such as the fundamental frequency and/or the phase of the second signal.

Abstract: When a reference signal is generated for a digital-to-analog converter in the feedback path of a sigma-delta modulator, the reference signal can contain modulated error signals, for example when the reference generator implements dynamic element matching. By controlling the reference signal generation in dependence on the bitstream output from the sigma-delta modulator, the effects of intermodulation of the reference signal with the bitstream can be reduced.

Abstract: When a reference signal is generated for a digital-to-analog converter in the feedback path of a sigma-delta modulator, the reference signal can contain modulated error signals, for example when the reference generator implements dynamic element matching. By controlling the reference signal generation in dependence on the bitstream output from the sigma-delta modulator, the effects of intermodulation of the reference signal with the bitstream can be reduced.

Abstract: A method of manufacturing an electronic device, particularly an acceleration sensor, comprising providing a wafer (10) having first and second semiconductor layers (12, 16) with a buried oxide layer (14) therebetween and forming a semiconductor device (such as a detection circuit) on one side of the wafer (10) in the first semiconductor layer (16) and a micro-electromechanical systems (MEMS) device on the opposite side of the wafer (10) in the second semi-conductor layer (12).

Abstract: The invention relates to the determination of the velocity of a conductive pen 102 along a graphic tablet 100. Generation of successive pulses in successive conductors, arranged in a regular pattern in the tablet, produces an electromagnetic signal in a conductive pen situated in the vicinity of the tablet. When the pen is near the writing surface of the tablet, the pen signal exhibits a local maximum which is indicative of the location of the pen. The distance between the edges to both sides of this local maximum constitutes an indication of the velocity of the pen.

Abstract: A rotary magnetic head device for a helical scanning magnetic recording and reproducing apparatus includes a rotary drum, a thin-film magnetic head (6) protruding from the rotary drum in a diametrical direction for coming into contact with a magnetic tape (7), obliquely wound around part of the outer peripheral surface of the rotary drum, and head control circuit for adjusting the protrusion of the magnetic head (6) in the diametrical direction. The head control circuit includes a feed-forward control arrangement (9) to bring and hold the magnetic head into a protruded position in which the magnetic head exerts a constant normal force on a tape (7) wound around the drum.

Abstract: A graphic tablet includes a number of parallel electrodes whereto a series of patterns is presented in order to determine the position of a pen relative to the electrodes. As a result of such presentation, a series of code elements is formed on an electrode, which series can be picked up by the pen and is representative of the relevant electrode. When the patterns are suitably chosen, a short series of patterns suffices, so that the determination of the position requires less time.

Abstract: In a data processing system comprising a graphic tablet and a wireless stylus cooperating with the tablet, the stylus is activated by an activation signal transmitted by a display screen integrated with the tablet. For the activation signal use is made of a signal which is transmitted any way by the display screen in the normal operational mode. The stylus is arranged to receive the signal and to change over from a battery-saving standby mode to an operational mode upon reception of this signal.