Patents by Inventor Koh-ichi Fukazawa

Koh-ichi Fukazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5093282
    Abstract: Disclosed is a method for making a semiconductor device in which the Pin Grid Array (PGA) is improved so that a plurality of lead pins project from the undersurface of a metal base of a package substrate as input and output terminals of a Large Scale Integrated-circuit (LSI). The method comprises mounting a semiconductor chip on a heat sink to the base, superposing a printed circuit board on the base and connecting electrical lead pins to the outer ends of wiring patterns which are formed radially and downwardly projecting through the base, and assembling a metal shell to the upper surface of the base and covering the chip, bonding wires and wiring patterns, wherein the patterns are formed such that the outer ends of the patterns are located within the vicinity over the outermost rows and columns of through holes for connecting lead pins.
    Type: Grant
    Filed: January 29, 1991
    Date of Patent: March 3, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun-ichi Ohno, Koh-ichi Fukazawa, Masamichi Shindo