Patents by Inventor Kohei Ebihara

Kohei Ebihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260164733
    Abstract: A semiconductor device includes: a first insulating film provided on a semiconductor layer, having a first opening that exposes an impurity region, and containing SiO2 as a main component; a second insulating film provided on the first insulating film, having a second opening that exposes the impurity region, and containing SiO2 as a main component; and a semi-insulating film provided on the second insulating film and connected to the impurity region via the first opening and the second opening, in which a width of the second opening is larger than a width of the first opening.
    Type: Application
    Filed: October 2, 2025
    Publication date: June 11, 2026
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei EBIHARA, Masanori TSUKUDA, Fumihito MASUOKA
  • Patent number: 12471328
    Abstract: A semiconductor device includes: a semiconductor substrate having a drift layer of a first conductivity type; an active region in which a main current flows in a thickness direction of the semiconductor substrate; a terminal region of a second conductivity type formed in a surface layer of the drift layer and surrounding the active region; a covering material covering the terminal region; and a peripheral well region of a first conductivity type formed in the surface layer of the drift layer on an outer side of the terminal region and having an impurity concentration higher than that of the drift layer, wherein a peripheral end of the covering material is arranged on an inner side of a peripheral end of the semiconductor substrate, and the peripheral well region is at least partially formed under the covering material and not formed under a peripheral end of the covering material.
    Type: Grant
    Filed: August 7, 2023
    Date of Patent: November 11, 2025
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Ebihara
  • Patent number: 12464767
    Abstract: In a semiconductor device, a semiconductor substrate is divided into an inner region in which an active region is provided and an outer region surrounding the inner region. The semiconductor device includes a semiconductor layer of a first conductivity type, a termination well region of a second conductivity type selectively provided in an upper layer portion of the semiconductor layer to surround the inner region, an impurity region selectively provided in an upper layer portion of the termination well region, a front surface electrode, a back surface electrode, an insulation film being provided to partially cover a top of the termination well region, an outer peripheral wire layer surrounding the inner region, at least a part of which is provided on the insulation film, and an interlayer insulation film at least covering the insulation film and the outer peripheral wire layer.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: November 4, 2025
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Kohei Ebihara
  • Publication number: 20250253200
    Abstract: A semiconductor device includes a semiconductor substrate in which a cell portion and a termination portion are defined, an electrode provided on an upper surface of the cell portion, a withstand voltage holding structure that is provided in the termination portion and holds a withstand voltage, an insulating protective film covering an upper surface of the withstand voltage holding structure, a waterproof film covering at least the insulating protective film, and an organic protective film covering a part of the waterproof film. The outer peripheral end portion of the electrode sits on the inner peripheral end portion of the insulating protective film. The inner peripheral end portion of the organic protective film sits on the outer peripheral end portion of the electrode. An outer peripheral end of the organic protective film is located on the inner peripheral side relative to the outer peripheral end of the insulating protective film.
    Type: Application
    Filed: November 25, 2024
    Publication date: August 7, 2025
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yosuke NAKATA, Kohei EBIHARA
  • Patent number: 12363943
    Abstract: To mitigate adverse effects on a surface electrode of a semiconductor device. The semiconductor device includes: a first well region formed in a surface layer of an upper surface of a drift layer; a gate electrode; a second well region surrounding the first well region as seen in plan view; and a gate portion covering an interlayer insulation film and the gate electrode exposed from the interlayer insulation film. An outside edge portion of the gate electrode is farther from the first well region than an outside edge portion of the gate portion and closer to the first well region than an outside edge portion of the second well region.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: July 15, 2025
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Ebihara, Shiro Hino
  • Patent number: 12283628
    Abstract: A semiconductor device includes a semiconductor layer including a super junction layer in which an n-type pillar layer and a p-type pillar layer are alternately disposed and a p-type withstand voltage holding structure formed on an upper layer part of the semiconductor layer to surround an active region. At least one withstand voltage holding structure overlaps with the super junction layer in a plan view. At least one withstand voltage holding structure overlapping with the super junction layer in a plan view has a gap which is an intermittent part of the withstand voltage holding structure.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: April 22, 2025
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masanao Ito, Kohei Ebihara
  • Publication number: 20250112103
    Abstract: A semiconductor device includes a field insulating film formed on an epitaxial layer, a front surface electrode riding onto an inner peripheral end of the field insulating film, and an outer peripheral electrode riding onto an outer peripheral end of the field insulating film. To a surface portion of the epitaxial layer, connected is the front surface electrode, and in the surface portion of the epitaxial layer, formed is a well region extending up to the outside of the outer peripheral end of the front surface electrode. A moisture-resistant insulating film is formed so as to cover the outer peripheral end of the front surface electrode, an inner peripheral end of the outer peripheral electrode, and the field insulating film. On the moisture-resistant insulating film, formed is a semi-insulating film connected to the front surface electrode and the outer peripheral electrode which are exposed from the moisture-resistant insulating film.
    Type: Application
    Filed: July 29, 2021
    Publication date: April 3, 2025
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei EBIHARA
  • Publication number: 20240313095
    Abstract: An RC-IGBT includes a semiconductor substrate having a cell region, a wiring region, and a termination region. The semiconductor substrate includes a diffusion layer of a second conductivity type provided on a first main surface side of a drift layer in an IGBT region, a diode region, the wiring region, and the termination region. The diffusion layer includes a base layer in the IGBT region, an anode layer in the diode region, a wiring well layer in the wiring region, and a termination well layer in the termination region. A depth of the base layer is less than depths of a plurality of trench gates, and is equal to or more than depths of the anode layer, the wiring well layer, and the termination well layer.
    Type: Application
    Filed: February 15, 2024
    Publication date: September 19, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinya SONEDA, Koichi NISHI, Kazuya KONISHI, Kohei EBIHARA
  • Publication number: 20240274655
    Abstract: A semiconductor device includes: a semiconductor substrate having a drift layer of a first conductivity type; an active region in which a main current flows in a thickness direction of the semiconductor substrate; a terminal region of a second conductivity type formed in a surface layer of the drift layer and surrounding the active region; a covering material covering the terminal region; and a peripheral well region of a first conductivity type formed in the surface layer of the drift layer on an outer side of the terminal region and having an impurity concentration higher than that of the drift layer, wherein a peripheral end of the covering material is arranged on an inner side of a peripheral end of the semiconductor substrate, and the peripheral well region is at least partially formed under the covering material and not formed under a peripheral end of the covering material.
    Type: Application
    Filed: August 7, 2023
    Publication date: August 15, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei EBIHARA
  • Patent number: 11842895
    Abstract: An SBD includes: a terminal well region formed to surround an active region; a field insulating film formed to cover part of the terminal well region; a surface electrode formed on a drift layer on an inner side in relation to the field insulating film and electrically connected to the terminal well region; a surface protection film covering an end portion on an outer side of the surface electrode; and a back surface electrode formed on a back surface of a single crystal substrate. An end portion of an outer side of the surface electrode in the corner portion of the terminal region is located on an inner side in relation to the end portion of the outer side of the surface electrode in a straight portion of a terminal region based on a position of an end portion of an outer side of the terminal well region.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: December 12, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Ebihara, Takaaki Tominaga
  • Publication number: 20230378342
    Abstract: In a semiconductor device, a semiconductor substrate is divided into an inner region in which an active region is provided and an outer region surrounding the inner region. The semiconductor device includes a semiconductor layer of a first conductivity type, a termination well region of a second conductivity type selectively provided in an upper layer portion of the semiconductor layer to surround the inner region, an impurity region selectively provided in an upper layer portion of the termination well region, a front surface electrode, a back surface electrode, an insulation film being provided to partially cover a top of the termination well region, an outer peripheral wire layer surrounding the inner region, at least a part of which is provided on the insulation film, and an interlayer insulation film at least covering the insulation film and the outer peripheral wire layer.
    Type: Application
    Filed: November 6, 2020
    Publication date: November 23, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei EBIHARA
  • Patent number: 11804555
    Abstract: The present invention relates to a semiconductor device, wherein the semiconductor substrate includes: a semiconductor layer; and a well region, the semiconductor device includes: a surface electrode provided on a second main surface on a side opposite to a first main surface; a back surface electrode provided on the first main surface; and an upper surface film covering an end edge portion of the surface electrode and at least part of an outer side region outside an end surface of the surface electrode of the semiconductor substrate, the well region includes a portion extending to the outer side region and a portion extending to an inner side region inside the end surface of the surface electrode, and the upper surface film includes at least one outer peripheral opening part provided along an outer periphery of the surface electrode away from the surface electrode of the outer side region.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: October 31, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Ebihara, Shiro Hino, Kosuke Miyazaki, Yasushi Takaki
  • Publication number: 20230253492
    Abstract: To mitigate adverse effects on a surface electrode of a semiconductor device. The semiconductor device includes: a first well region formed in a surface layer of an upper surface of a drift layer; a gate electrode; a second well region surrounding the first well region as seen in plan view; and a gate portion covering an interlayer insulation film and the gate electrode exposed from the interlayer insulation film. An outside edge portion of the gate electrode is farther from the first well region than an outside edge portion of the gate portion and closer to the first well region than an outside edge portion of the second well region.
    Type: Application
    Filed: February 17, 2021
    Publication date: August 10, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei EBIHARA, Shiro HINO
  • Publication number: 20230253345
    Abstract: A semiconductor device includes a field insulating film formed on an epitaxial layer, a front surface electrode covering an inner peripheral end of the field insulating film, and an outer peripheral electrode covering an outer peripheral end of the field insulating film. In a surface layer portion of the epitaxial layer, a termination well region that is connected to the front surface electrode and extends to the outside of an outer peripheral end of the front surface electrode is formed. The semi-insulating film is formed so as to cover a part of the field insulating film apart from the front surface electrode and the outer peripheral electrode. The semi-insulating film is connected to the epitaxial layer through an opening formed in the field insulating film in each of a region inside and a region outside an outer peripheral end of the termination well region.
    Type: Application
    Filed: November 21, 2022
    Publication date: August 10, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei EBIHARA, Fumihito MASUOKA, Masanori TSUKUDA, Akihiko FURUKAWA
  • Patent number: 11508638
    Abstract: A semiconductor substrate has a first surface and a second surface that includes an inner region and an outer region. The semiconductor substrate includes a drift layer of a first conductivity type and a terminal well region of a second conductivity type. The terminal well region includes a portion that extends from between the inner region and the outer region toward the outer region. A first electrode is on the first surface. A second electrode is on at least part of the inner region and electrically connected to the terminal well region, and has its edge located on a boundary between the inner region and the outer region. A peripheral structure is provided on part of the outer region, away from the second electrode. A surface protective film covers the edge of the second electrode and at least part of the outer region and has the peripheral structure engaged therein.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: November 22, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Kohei Ebihara
  • Publication number: 20220231160
    Abstract: A semiconductor device includes a semiconductor layer including a super junction layer in which an n-type pillar layer and a p-type pillar layer are alternately disposed and a p-type withstand voltage holding structure formed on an upper layer part of the semiconductor layer to surround an active region. At least one withstand voltage holding structure overlaps with the super junction layer in a plan view. At least one withstand voltage holding structure overlapping with the super junction layer in a plan view has a gap which is an intermittent part of the withstand voltage holding structure.
    Type: Application
    Filed: July 16, 2019
    Publication date: July 21, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masanao ITO, Kohei EBIHARA
  • Publication number: 20220149163
    Abstract: An SBD includes: a terminal well region formed to surround an active region; a field insulating film formed to cover part of the terminal well region; a surface electrode formed on a drift layer on an inner side in relation to the field insulating film and electrically connected to the terminal well region; a surface protection film covering an end portion on an outer side of the surface electrode; and a back surface electrode formed on a back surface of a single crystal substrate. An end portion of an outer side of the surface electrode in the corner portion of the terminal region is located on an inner side in relation to the end portion of the outer side of the surface electrode in a straight portion of a terminal region based on a position of an end portion of an outer side of the terminal well region.
    Type: Application
    Filed: April 11, 2019
    Publication date: May 12, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei EBIHARA, Takaaki TOMINAGA
  • Patent number: 11222973
    Abstract: A technique is provided for effectively suppressing a forward voltage shift due to occurrence of a stacking fault. A semiconductor device relating to the present technique includes a first well region of a second conductivity type, a second well region of the second conductivity type which is so provided as to sandwich the whole of a plurality of first well regions in a plan view and has an area larger than that of each of the first well regions, a third well region of the second conductivity type which is so provided as to sandwich the second well region in a plan view and has an area larger than that of the second well region, and a dividing region of a first conductivity type provided between the second well region and the third well region, having an upper surface which is in contact with an insulator.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: January 11, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shiro Hino, Koji Sadamatsu, Hideyuki Hatta, Yuichi Nagahisa, Kohei Ebihara
  • Publication number: 20210399144
    Abstract: The present invention relates to a semiconductor device, wherein the semiconductor substrate includes: a semiconductor layer; and a well region, the semiconductor device includes: a surface electrode provided on a second main surface on a side opposite to a first main surface; a back surface electrode provided on the first main surface; and an upper surface film covering an end edge portion of the surface electrode and at least part of an outer side region outside an end surface of the surface electrode of the semiconductor substrate, the well region includes a portion extending to the outer side region and a portion extending to an inner side region inside the end surface of the surface electrode, and the upper surface film includes at least one outer peripheral opening part provided along an outer periphery of the surface electrode away from the surface electrode of the outer side region.
    Type: Application
    Filed: January 29, 2019
    Publication date: December 23, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei EBIHARA, Shiro HINO, Kosuke MIYAZAKI, Yasushi TAKAKI
  • Patent number: 11094815
    Abstract: An object of the present invention is to provide a highly reliable semiconductor device by preventing precipitation of an oxide to prevent peeling of a resin layer. The semiconductor device includes: a resin layer provided so that at least a part of the resin layer extends on a front surface of a semiconductor layer on an outer peripheral side with respect to an outer peripheral end of a field insulating film; and a floating well region spaced apart from a termination well region in a surface layer of the semiconductor layer, the floating well region formed to be in contact with an outer peripheral end of the field insulating film to extend to the outer peripheral side with respect to the outer peripheral end of the field insulating film.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: August 17, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Ebihara, Naruto Miyakawa