Patents by Inventor Kohei Matsui
Kohei Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230078192Abstract: A battery pack may include battery cells, each of which may have a pair of first surface portions facing each other in a first direction and have a positive electrode plate and a negative electrode plate stacked so as to be arranged in the first direction, an outer shell portion that houses the stacked battery cells, elastic structures, each of which may be provided between the battery cells adjacent to each other in the first direction, and a plurality of frames that may fix the battery cells to the outer shell portion. The elastic structures may be disposed so as to cover the central portions of the first surface portions and the frames may be disposed so as to cover an outer circumference portions of the first surface portions.Type: ApplicationFiled: January 25, 2021Publication date: March 16, 2023Applicants: MAZDA MOTOR CORPORATION, ISUZU MOTORS LIMITED, SUBARU CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, HINO MOTORS, LTD., YAMAHA HATSUDOKI KABUSHIKI KAISHAInventors: Hirokazu KITA, Shin MURATA, Kohei MATSUI, Hayato SAITO, Tomo MIZOGUCHI, Norio SUZUKI, Hiroyoshi NEMORI, Yuji ENDO, Akira KURODA, Hidemasa TAKAYAMA, Takaaki FUKUTA
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Patent number: 11407774Abstract: By providing a novel polycyclic aromatic compound in which a plurality of aromatic rings is linked via a nitrogen atom, a boron atom, or the like, options of a material for an organic EL element are increased. In addition, by using the novel polycyclic aromatic compound as a material for an organic electroluminescent element, an excellent organic EL element is provided.Type: GrantFiled: August 25, 2017Date of Patent: August 9, 2022Assignees: Kwansei Gakuin Educational Foundation, SK Materials JNC Co., Ltd.Inventors: Takuji Hatakeyama, Kohei Matsui, Yusuke Watanabe, Daisuke Baba, Yasuyuki Sasada, Motoki Yanai, Toshiaki Ikuta
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Patent number: 11394310Abstract: In a power conversion device, a distance between an output terminal of a first switching module and a cathode terminal of a first diode module in a first direction is arranged to be substantially equal to a distance between an output terminal of a second switching module and an anode terminal of a second diode module in the first direction.Type: GrantFiled: June 8, 2020Date of Patent: July 19, 2022Assignee: FUJI ELECTRIC CO., LTD.Inventor: Kohei Matsui
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Publication number: 20220077398Abstract: A polycyclic aromatic compound having a structure consisting of one or two or more of structural units represented by Formula (1) is useful as a material for an organic device such as an organic electroluminescent element such as an organic electroluminescent element; wherein A, B, and C rings are an optionally substituted aryl or heteroaryl ring, at least one ring selected from the group consisting of A, B, and C rings in the structure is a ring represented by Formula (Het-1) or (Het-2), Y1 is B, X1 and X2 are each independently >O or >N—R(R is a substituted or unsubstituted aryl), X3 is >O or >S, one of Za is N and the other is N or C—RZ, Zbs are carbons directly bonded to Y1, X1, and X2, N or C—RZ, RZ is hydrogen or a substituent, and at least one hydrogen in the structure may be substituted with cyano, a halogen, or deuterium.Type: ApplicationFiled: August 26, 2021Publication date: March 10, 2022Inventors: Takuji HATAKEYAMA, Kohei MATSUI, Kazuki SHIGEMATSU
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Publication number: 20210028714Abstract: In a power conversion device, a distance between an output terminal of a first switching module and a cathode terminal of a first diode module in a first direction is arranged to be substantially equal to a distance between an output terminal of a second switching module and an anode terminal of a second diode module in the first direction.Type: ApplicationFiled: June 8, 2020Publication date: January 28, 2021Inventor: Kohei MATSUI
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Patent number: 10884004Abstract: A fluorescent probe for calcium ion detection that has an excellent photofading resistance and quick Ca2+ detection kinetics and can be localized at an arbitrary site in a cell is provided. The fluorescent probe contains a compound represented by the following general formula (I) or a salt thereof: A method for detecting intracellular calcium ions including (a) introducing the compound above or a salt thereof into a cell and (b) measuring the fluorescence emitted by the compound or a salt thereof in the cell is also provided.Type: GrantFiled: January 13, 2017Date of Patent: January 5, 2021Assignee: The University of TokyoInventors: Kenzo Hirose, Daisuke Asanuma, Kohei Matsui, Rieko Tanaka
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Patent number: 10453770Abstract: In each of a plurality of semiconductor element groups of a power converter, a second semiconductor switching element and a third semiconductor switching element are shifted from each other in a second direction such that at least a portion of fins with which the second semiconductor switching element overlaps as viewed in a direction orthogonal to surfaces of coolers is different from fins with which the third semiconductor switching element overlaps as viewed in the direction orthogonal to the surfaces of the coolers.Type: GrantFiled: October 25, 2018Date of Patent: October 22, 2019Assignee: FUJI ELECTRIC CO., LTD.Inventors: Masamitsu Takizawa, Nobuyuki Kobayashi, Yoshio Mori, So Nakamichi, Kohei Matsui
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Publication number: 20190256538Abstract: By providing a novel polycyclic aromatic compound in which a plurality of aromatic rings is linked via a nitrogen atom, a boron atom, or the like, options of a material for an organic EL element are increased. In addition, by using the novel polycyclic aromatic compound as a material for an organic electroluminescent element, an excellent organic EL element is provided.Type: ApplicationFiled: August 25, 2017Publication date: August 22, 2019Applicants: Kwansei Gakuin Educational Foundation, JNC CorporationInventors: Takuji HATAKEYAMA, Kohei MATSUI, Yusuke WATANABE, Daisuke BABA, Yasuyuki SASADA, Motoki YANAI, Toshiaki IKUTA
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Publication number: 20190148259Abstract: In each of a plurality of semiconductor element groups of a power converter, a second semiconductor switching element and a third semiconductor switching element are shifted from each other in a second direction such that at least a portion of fins with which the second semiconductor switching element overlaps as viewed in a direction orthogonal to surfaces of coolers is different from fins with which the third semiconductor switching element overlaps as viewed in the direction orthogonal to the surfaces of the coolers.Type: ApplicationFiled: October 25, 2018Publication date: May 16, 2019Inventors: Masamitsu TAKIZAWA, Nobuyuki KOBAYASHI, Yoshio MORI, So NAKAMICHI, Kohei MATSUI
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Publication number: 20190094248Abstract: A fluorescent probe for calcium ion detection that has an excellent photofading resistance and quick Ca2+ detection kinetics and can be localized at an arbitrary site in a cell is provided. The fluorescent probe contains a compound represented by the following general formula (I) or a salt thereof: A method for detecting intracellular calcium ions including (a) introducing the compound above or a salt thereof into a cell and (b) measuring the fluorescence emitted by the compound or a salt thereof in the cell is also provided.Type: ApplicationFiled: January 13, 2017Publication date: March 28, 2019Applicant: THE UNIVERSITY OF TOKYOInventors: Kenzo HIROSE, Daisuke ASANUMA, Kohei MATSUI, Rieko TANAKA
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Patent number: 10020282Abstract: In a heat insulating load jig 11 of the present invention, a solder material 14 having a melting point or a solidus temperature in a range between a thermal resistance temperature of a semiconductor chip 13 and a temperature 100° C. below the thermal resistance temperature is interposed between a circuit board 12 and the semiconductor chip 13; a heat insulating body 17 is placed on an upper side of the semiconductor chip 13 in this state; a metal weight 16 is disposed on the heat insulating body 17; and load is applied to the semiconductor chip 13 while the solder material 14 is melted and solidified.Type: GrantFiled: April 24, 2013Date of Patent: July 10, 2018Assignees: NISSAN MOTOR CO., LTD., SANKEN ELECTRIC CO., LTD.Inventors: Satoshi Tanimoto, Yusuke Zushi, Yoshinori Murakami, Kohei Matsui, Shinji Sato, Yu Fukushima
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Patent number: 9947607Abstract: An inverter includes: an inverter circuit including: a power semiconductor module; and an inverter circuit module including a passive component; a cooler including a cooler surface to which the power semiconductor module is joined; an inverter case sealing the inverter circuit with the cooler surface of the cooler; and a sealed heat insulating layer being formed on the cooler surface of the cooler and having a thickness that is equal to or less than a maximum convection suppressing distance.Type: GrantFiled: October 24, 2016Date of Patent: April 17, 2018Assignee: FUJI ELECTRIC CO., LTD.Inventor: Kohei Matsui
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Patent number: 9698082Abstract: A semiconductor device according to the present invention, having an Au-based solder layer (3) sandwiched between a semiconductor element (1) and a Cu substrate (2) made mainly of Cu, in which the semiconductor device includes: a dense metal film (23) which is arranged between the Cu substrate (2) and the Au-based solder layer (3), and has fine slits (24) patterned to have a predetermined shape in a plan view; and fine structures (4) with dumbbell-like cross section, which have Cu and Au as main elements, and are each buried in the Cu substrate (2), the Au-based solder layer (3), and the fine slits (24) of the dense metal film (23).Type: GrantFiled: November 13, 2013Date of Patent: July 4, 2017Assignees: NISSAN MOTOR CO., LTD., SANKEN ELECTRIC CO., LTD., FUJI ELECTRIC CO., LTD.Inventors: Satoshi Tanimoto, Shinji Sato, Hidekazu Tanisawa, Kohei Matsui
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Publication number: 20170162465Abstract: An inverter includes: an inverter circuit including: a power semiconductor module; and an inverter circuit module including a passive component; a cooler including a cooler surface to which the power semiconductor module is joined; an inverter case sealing the inverter circuit with the cooler surface of the cooler; and a sealed heat insulating layer being formed on the cooler surface of the cooler and having a thickness that is equal to or less than a maximum convection suppressing distance.Type: ApplicationFiled: October 24, 2016Publication date: June 8, 2017Applicant: FUJI ELECTRIC CO., LTD.Inventor: Kohei MATSUI
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Publication number: 20160293522Abstract: A semiconductor device according to the present invention, having an Au-based solder layer (3) sandwiched between a semiconductor element (1) and a Cu substrate (2) made mainly of Cu, in which the semiconductor device includes: a dense metal film (23) which is arranged between the Cu substrate (2) and the Au-based solder layer (3), and has fine slits (24) patterned to have a predetermined shape in a plan view; and fine structures (4) with dumbbell-like cross section, which have Cu and Au as main elements, and are each buried in the Cu substrate (2), the Au-based solder layer (3), and the fine slits (24) of the dense metal film (23).Type: ApplicationFiled: November 13, 2013Publication date: October 6, 2016Applicants: NISSAN MOTOR CO., LTD., SANKEN ELECTRIC CO., LTD., FUJI ELECTRIC CO., LTD.Inventors: Satoshi TANIMOTO, Shinji SATO, Hidekazu TANISAWA, Kohei MATSUI
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Patent number: 8975182Abstract: A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.Type: GrantFiled: July 27, 2012Date of Patent: March 10, 2015Assignees: Nissan Motor Co., Ltd., Sumitomo Metal Mining Co., Ltd., Sanken Electric Co., Ltd., Fuji Electric Co., Ltd.Inventors: Satoshi Tanimoto, Yusuke Zushi, Yoshinori Murakami, Takashi Iseki, Masato Takamori, Shinji Sato, Kohei Matsui
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Publication number: 20150041525Abstract: In a heat insulating load jig 11 of the present invention, a solder material 14 having a melting point or a solidus temperature in a range between a thermal resistance temperature of a semiconductor chip 13 and a temperature 100° C. below the thermal resistance temperature is interposed between a circuit board 12 and the semiconductor chip 13; a heat insulating body 17 is placed on an upper side of the semiconductor chip 13 in this state; a metal weight 16 is disposed on the heat insulating body 17; and load is applied to the semiconductor chip 13 while the solder material 14 is melted and solidified.Type: ApplicationFiled: April 24, 2013Publication date: February 12, 2015Applicants: NISSAN MOTOR CO., LTD., Sanken Electric Co., Ltd.Inventors: Satoshi Tanimoto, Yusuke Zushi, Yoshinori Murakami, Kohei Matsui, Shinji Sato, Yu Fukushima
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Patent number: 8921998Abstract: A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.Type: GrantFiled: August 24, 2012Date of Patent: December 30, 2014Assignees: Nissan Motor Co., Ltd., Sanken Electric Co., Ltd., Fuji Electric Co., Ltd.Inventors: Yusuke Zushi, Yoshinori Murakami, Satoshi Tanimoto, Shinji Sato, Kohei Matsui
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Patent number: 8916882Abstract: A switching circuit includes: a first switching element (Q1); a resistor (11) inserted between a control electrode (G) of the first switching element (Q1) and a control circuit (13) switching the first switching element (Q1); and a first capacitor (15) and a second switching element (14) connected in series between the control electrode (G) of the first switching element (Q1) and a low potential-side electrode (S) of the first switching element (Q1). A high potential-side electrode of the second switching element (14) is connected to the control electrode (G) of the first switching element (Q1). An electrode of the first capacitor (15) is connected to the low potential-side electrode (S) of the first switching element (Q1). A control electrode of the second switching element (14) is connected to an electrode of the resistor (11) connected to the control circuit (13).Type: GrantFiled: May 11, 2012Date of Patent: December 23, 2014Assignees: Nissan Motor Co., Ltd., Sanken Electric Co., Ltd., Fuji Electric Co., Ltd.Inventors: Yusuke Zushi, Yoshinori Murakami, Satoshi Tanimoto, Shinji Sato, Kohei Matsui
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Patent number: 8908302Abstract: An exposure method for color filter substrate is provided. As shown in FIG. 7(a), exposure is performed while a substrate 20 to which a photoresist has been applied is being transported in the Y direction, to simultaneously form first layers 81 and layers 91 in first non-display regions 51 (regions indicated by hatching sloping upward to the right) and the display region, respectively, on the substrate 20. Next, as shown in (b), the substrate 20 is rotated by 90 degrees, and exposure is performed while the substrate 20 is being transported in the X direction, to form second layers 82 in second non-display regions 52 (regions indicated by hatching sloping upward to the right). Thus, dummy PSs 71 and dummy PSs 72 arranged with desired pitches and having desired shapes can be formed in the first non-display regions 51 and the second non-display regions 52, respectively.Type: GrantFiled: January 7, 2011Date of Patent: December 9, 2014Assignee: Toppan Printing Co., Ltd.Inventors: Kohei Matsui, Ryosuke Yasui