Patents by Inventor Kohei Miki
Kohei Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12243739Abstract: A method for manufacturing a semiconductor wafer according to the invention of the present application includes a first step of forming a gallium nitride growth layer which is divided into a plurality of small sections, on an upper surface of a silicon substrate and a second step of filling portions between the plurality of small sections with an insulating film, wherein the insulating film exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate.Type: GrantFiled: October 23, 2019Date of Patent: March 4, 2025Assignee: Mitsubishi Electric CorporationInventors: Yuki Taketomi, Kohei Miki, Shinichi Miyakuni
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Patent number: 12224657Abstract: A power converting device includes upper-arm and lower-arm gate drive circuits which respectively drive upper-arm and lower-arm semiconductor switching elements and which respectively include upper-arm and lower-arm time point detection circuits for detecting time points at which voltages between main terminals of the upper-arm and lower-arm semiconductor switching elements have crossed respective reference voltages, and a controller including a calculator which calculates a change time point of an inverter output voltage and a PWM command pulse generator which generates, on the basis of information about the time point calculated by the calculator, a PWM command pulse to be given to the upper-arm gate drive circuit and the lower-arm gate drive circuit.Type: GrantFiled: June 17, 2020Date of Patent: February 11, 2025Assignee: Mitsubishi Electric CorporationInventors: Takayoshi Miki, Kohei Onda
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Patent number: 12042176Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).Type: GrantFiled: June 28, 2022Date of Patent: July 23, 2024Assignee: TRANSELL Co., Ltd.Inventors: Shuji Nakamura, Ken Masamune, Kohei Miki, Katsuyuki Sado, Hirokazu Takagawa, Fumiya Iwashima, Akihiro Nabeshima
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Patent number: 11881516Abstract: Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.Type: GrantFiled: December 27, 2018Date of Patent: January 23, 2024Assignee: Mitsubishi Electric CorporationInventors: Kohei Miki, Shinichi Miyakuni, Kohei Nishiguchi
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Publication number: 20230240866Abstract: A stent 1 which is inserted into a catheter and extruded from the catheter into a blood vessel to dilate a blood vessel, wherein the stent is equipped with a first stent body 10 in which a plurality of first cells comprising struts arranged in a frame shape are spread in the circumferential direction and are contiguous in the central axial direction and a second stent body 20, interpolated into the first stent body, in which a plurality of second cells comprising struts arranged in a frame shape are spread in the circumferential direction and are contiguous in the central axial direction, and, in a state in which the second stent body 20 is interpolated into the first stent body 10, the intersecting portions of the second cells are arranged in the hole portions of the first cells and the first stent body 10 and the second stent body 20 are not connected to each other in the radial direction.Type: ApplicationFiled: April 12, 2023Publication date: August 3, 2023Applicant: T.G. MEDICAL INC.Inventors: Yasuhiro Shobayashi, Kohei Miki
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Publication number: 20230015695Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).Type: ApplicationFiled: June 28, 2022Publication date: January 19, 2023Inventors: Shuji NAKAMURA, Ken MASAMUNE, Kohei MIKI, Katsuyuki SADO, Hirokazu TAKAGAWA, Fumiya IWASHIMA, Akihiro NABESHIMA
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Patent number: 11478273Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).Type: GrantFiled: January 31, 2018Date of Patent: October 25, 2022Assignee: TRANSELL CO., LTD.Inventors: Shuji Nakamura, Ken Masamune, Kohei Miki, Katsuyuki Sado, Hirokazu Takagawa, Fumiya Iwashima, Akihiro Nabeshima
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Publication number: 20220290327Abstract: A method for manufacturing a semiconductor wafer according to the invention of the present application includes a first step of forming a gallium nitride growth layer which is divided into a plurality of small sections, on an upper surface of a silicon substrate and a second step of filling portions between the plurality of small sections with an insulating film, wherein the insulating film exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate.Type: ApplicationFiled: October 23, 2019Publication date: September 15, 2022Applicant: Mitsubishi Electric CorporationInventors: Yuki TAKETOMI, Kohei MIKI, Shinichi MIYAKUNI
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Publication number: 20210384312Abstract: Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.Type: ApplicationFiled: December 27, 2018Publication date: December 9, 2021Applicant: Mitsubishi Electric CorporationInventors: Kohei MIKI, Shinichi MIYAKUNI, Kohei NISHIGUCHI
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Patent number: 10777643Abstract: A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.Type: GrantFiled: August 21, 2019Date of Patent: September 15, 2020Assignee: Mitsubishi Electric CorporationInventor: Kohei Miki
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Patent number: 10622216Abstract: A method for manufacturing a semiconductor device includes: forming a multilayered epitaxial structure on a substrate; applying a novolac-based resist on the multilayered epitaxial structure and patterning the resist through transfer; tapering a shape of the patterned resist by baking; dry-etching the multilayered epitaxial structure using the tapered resist as a mask; and after the dry etching, removing the resist and forming a coating film on the multilayered epitaxial structure, wherein an etching selection ratio between the resist and the multilayered epitaxial structure in the dry etching is controlled to 0.8 to 1.2 so that an inclination is formed in the multilayered epitaxial structure.Type: GrantFiled: February 15, 2018Date of Patent: April 14, 2020Assignee: Mitsubishi Electric CorporationInventor: Kohei Miki
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Publication number: 20190378897Abstract: A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.Type: ApplicationFiled: August 21, 2019Publication date: December 12, 2019Applicant: Mitsubishi Electric CorporationInventor: Kohei MIKI
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Publication number: 20190357940Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).Type: ApplicationFiled: January 31, 2018Publication date: November 28, 2019Inventors: Shuji Dean NAKAMURA, Ken MASAMUNE, Kohei MIKI, Katsuyuki SADO, Hirokazu TAKAGAWA, Fumiya IWASHIMA, Akihiro NABESHIMA
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Publication number: 20180342588Abstract: A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.Type: ApplicationFiled: February 15, 2018Publication date: November 29, 2018Applicant: Mitsubishi Electric CorporationInventor: Kohei MIKI
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Publication number: 20180342400Abstract: A method for manufacturing a semiconductor device includes: forming a multilayered epitaxial structure on a substrate; applying a novolac-based resist on the multilayered epitaxial structure and patterning the resist through transfer; tapering a shape of the patterned resist by baking; dry-etching the multilayered epitaxial structure using the tapered resist as a mask; and after the dry etching, removing the resist and forming a coating film on the multilayered epitaxial structure, wherein an etching selection ratio between the resist and the multilayered epitaxial structure in the dry etching is controlled to 0.8 to 1.2 so that an inclination is formed in the multilayered epitaxial structure.Type: ApplicationFiled: February 15, 2018Publication date: November 29, 2018Applicant: Mitsubishi Electric CorporationInventor: Kohei MIKI
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Patent number: 9805978Abstract: A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.Type: GrantFiled: October 31, 2016Date of Patent: October 31, 2017Assignee: Mitsubishi Electric CorporationInventors: Kohei Miki, Kazuyuki Onoe, Shinichi Miyakuni
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Patent number: 9773703Abstract: A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.Type: GrantFiled: October 31, 2016Date of Patent: September 26, 2017Assignee: Mitsubishi Electric CorporationInventors: Kohei Miki, Kazuyuki Onoe, Shinichi Miyakuni
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Publication number: 20170162439Abstract: A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.Type: ApplicationFiled: October 31, 2016Publication date: June 8, 2017Applicant: Mitsubishi Electric CorporationInventors: Kohei MIKI, Kazuyuki ONOE, Shinichi MIYAKUNI
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Patent number: 8455358Abstract: A first metal mask has a portion exposed at an opening of a second metal mask. The second metal mask is formed to be thicker than the first metal mask. The thickness of the first and second metal masks is such that the etching at an opening of the first mask reaches a source electrode when the etching at the opening of the second mask substantially reaches a semiconductor device forming layer.Type: GrantFiled: September 8, 2011Date of Patent: June 4, 2013Assignee: Mitsubishi Electric CorporationInventor: Kohei Miki
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Publication number: 20120115327Abstract: A first metal mask has a portion exposed at an opening of a second metal mask. The second metal mask is formed to be thicker than the first metal mask. The thickness of the first and second metal masks is such that the etching at an opening of the first mask reaches a source electrode when the etching at the opening of the second mask substantially reaches a semiconductor device forming layer.Type: ApplicationFiled: September 8, 2011Publication date: May 10, 2012Applicant: Mitsubishi Electric CorporationInventor: Kohei MIKI