Patents by Inventor Kohei Miki

Kohei Miki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881516
    Abstract: Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: January 23, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kohei Miki, Shinichi Miyakuni, Kohei Nishiguchi
  • Publication number: 20230240866
    Abstract: A stent 1 which is inserted into a catheter and extruded from the catheter into a blood vessel to dilate a blood vessel, wherein the stent is equipped with a first stent body 10 in which a plurality of first cells comprising struts arranged in a frame shape are spread in the circumferential direction and are contiguous in the central axial direction and a second stent body 20, interpolated into the first stent body, in which a plurality of second cells comprising struts arranged in a frame shape are spread in the circumferential direction and are contiguous in the central axial direction, and, in a state in which the second stent body 20 is interpolated into the first stent body 10, the intersecting portions of the second cells are arranged in the hole portions of the first cells and the first stent body 10 and the second stent body 20 are not connected to each other in the radial direction.
    Type: Application
    Filed: April 12, 2023
    Publication date: August 3, 2023
    Applicant: T.G. MEDICAL INC.
    Inventors: Yasuhiro Shobayashi, Kohei Miki
  • Publication number: 20230015695
    Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).
    Type: Application
    Filed: June 28, 2022
    Publication date: January 19, 2023
    Inventors: Shuji NAKAMURA, Ken MASAMUNE, Kohei MIKI, Katsuyuki SADO, Hirokazu TAKAGAWA, Fumiya IWASHIMA, Akihiro NABESHIMA
  • Patent number: 11478273
    Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: October 25, 2022
    Assignee: TRANSELL CO., LTD.
    Inventors: Shuji Nakamura, Ken Masamune, Kohei Miki, Katsuyuki Sado, Hirokazu Takagawa, Fumiya Iwashima, Akihiro Nabeshima
  • Publication number: 20220290327
    Abstract: A method for manufacturing a semiconductor wafer according to the invention of the present application includes a first step of forming a gallium nitride growth layer which is divided into a plurality of small sections, on an upper surface of a silicon substrate and a second step of filling portions between the plurality of small sections with an insulating film, wherein the insulating film exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate.
    Type: Application
    Filed: October 23, 2019
    Publication date: September 15, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuki TAKETOMI, Kohei MIKI, Shinichi MIYAKUNI
  • Publication number: 20210384312
    Abstract: Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.
    Type: Application
    Filed: December 27, 2018
    Publication date: December 9, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei MIKI, Shinichi MIYAKUNI, Kohei NISHIGUCHI
  • Patent number: 10777643
    Abstract: A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: September 15, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Miki
  • Patent number: 10622216
    Abstract: A method for manufacturing a semiconductor device includes: forming a multilayered epitaxial structure on a substrate; applying a novolac-based resist on the multilayered epitaxial structure and patterning the resist through transfer; tapering a shape of the patterned resist by baking; dry-etching the multilayered epitaxial structure using the tapered resist as a mask; and after the dry etching, removing the resist and forming a coating film on the multilayered epitaxial structure, wherein an etching selection ratio between the resist and the multilayered epitaxial structure in the dry etching is controlled to 0.8 to 1.2 so that an inclination is formed in the multilayered epitaxial structure.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: April 14, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Miki
  • Publication number: 20190378897
    Abstract: A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.
    Type: Application
    Filed: August 21, 2019
    Publication date: December 12, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei MIKI
  • Publication number: 20190357940
    Abstract: The present invention provide a puncture instrument capable of administering (supplying) a drug solution. The puncture instrument includes a puncture tip section (2); a first tubular body (3) connected to the puncture tip section (2) at the distal end; and an outer tubular body (5) at least partially covering the first tubular body (3). The first tubular body (3) is formed to be rotatable around an axis along the longitudinal direction. The first tubular body (3) has an outer diameter smaller than an inner diameter of the outer tubular body (5). A drug solution supply path (5a) is provided on the outside of the first tubular body (3).
    Type: Application
    Filed: January 31, 2018
    Publication date: November 28, 2019
    Inventors: Shuji Dean NAKAMURA, Ken MASAMUNE, Kohei MIKI, Katsuyuki SADO, Hirokazu TAKAGAWA, Fumiya IWASHIMA, Akihiro NABESHIMA
  • Publication number: 20180342588
    Abstract: A semiconductor device includes: a semiconductor substrate; a buffer layer provided on the semiconductor substrate; a GaN channel layer provided on the buffer layer; an AlGaN electron travel layer provided on the GaN channel layer; a GaN cap layer provided on the AlGaN electron travel layer, having a nitrogen polarity, and on which a plurality of recesses are formed; and a gate electrode, a source electrode and a drain electrode provided in each of the plurality of recesses.
    Type: Application
    Filed: February 15, 2018
    Publication date: November 29, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei MIKI
  • Publication number: 20180342400
    Abstract: A method for manufacturing a semiconductor device includes: forming a multilayered epitaxial structure on a substrate; applying a novolac-based resist on the multilayered epitaxial structure and patterning the resist through transfer; tapering a shape of the patterned resist by baking; dry-etching the multilayered epitaxial structure using the tapered resist as a mask; and after the dry etching, removing the resist and forming a coating film on the multilayered epitaxial structure, wherein an etching selection ratio between the resist and the multilayered epitaxial structure in the dry etching is controlled to 0.8 to 1.2 so that an inclination is formed in the multilayered epitaxial structure.
    Type: Application
    Filed: February 15, 2018
    Publication date: November 29, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei MIKI
  • Patent number: 9805978
    Abstract: A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: October 31, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kohei Miki, Kazuyuki Onoe, Shinichi Miyakuni
  • Patent number: 9773703
    Abstract: A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: September 26, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kohei Miki, Kazuyuki Onoe, Shinichi Miyakuni
  • Publication number: 20170162439
    Abstract: A method of manufacturing a semiconductor device includes: forming a resist separation layer on a first main surface of a SiC substrate; applying a resist retaining a shape at a temperature of 200° C. or higher on the resist separation layer; patterning the resist by photolithography; heating a stage an which the SiC substrate is placed to a temperature of 200° C. or higher by a temperature control function, and dry-etching the SiC substrate by using the patterned resist as a mask to form a via hole; and after forming the via hole, removing the resist separation layer to separate the resist from the SiC substrate.
    Type: Application
    Filed: October 31, 2016
    Publication date: June 8, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei MIKI, Kazuyuki ONOE, Shinichi MIYAKUNI
  • Patent number: 8455358
    Abstract: A first metal mask has a portion exposed at an opening of a second metal mask. The second metal mask is formed to be thicker than the first metal mask. The thickness of the first and second metal masks is such that the etching at an opening of the first mask reaches a source electrode when the etching at the opening of the second mask substantially reaches a semiconductor device forming layer.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: June 4, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Miki
  • Publication number: 20120115327
    Abstract: A first metal mask has a portion exposed at an opening of a second metal mask. The second metal mask is formed to be thicker than the first metal mask. The thickness of the first and second metal masks is such that the etching at an opening of the first mask reaches a source electrode when the etching at the opening of the second mask substantially reaches a semiconductor device forming layer.
    Type: Application
    Filed: September 8, 2011
    Publication date: May 10, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei MIKI
  • Patent number: 6723242
    Abstract: In the method of processing an organic chlorine compound in accordance with the present invention, slurry containing fly ash K including dioxins are supplied from a pretreatment bath to a biological treatment bath of a processing apparatus; nitrifying bacteria, denitrifying bacteria, aqueous ammonia, and methanol are supplied to the slurry from a nitrifying bacteria storage bath, a denitrifying bacteria storage bath, an ammonia storage bath, and a methanol storage bath, respectively; and a nitrifying reaction is carried out by the nitrifying bacteria in an aerobic atmosphere, so as to decompose the dioxins along with the nitrifying reaction.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: April 20, 2004
    Assignee: Sumitomo Heavy Industries, Ltd.
    Inventors: Masanobu Ohkata, Eiichi Nishikawa, Kohei Miki, Jirou Satou, Isamu Inoue
  • Patent number: 4786417
    Abstract: There is provided management of a photoresist resin containing waste solution discharged from printed circuit boards manufacturing process, printing industries, a semiconductor manufacturing industry and the other industries using photoresist materials. The photoresist resin containing waste solution is subjected to an ultrafiltration of the specified characteristics so as to separate definitely organic waste materials having relatively higher molecular weight which should be disposed from an effective and useful components contained in a permeate to be recycled or recovered resulting very efficient processing.
    Type: Grant
    Filed: July 22, 1987
    Date of Patent: November 22, 1988
    Assignee: Sumitomo Heavy Industries Ltd.
    Inventors: Kohei Miki, Hiroshi Saito