Patents by Inventor Kohei Miura
Kohei Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240069420Abstract: A projector case capable of accommodating a projector includes a case having formed therein an intake/exhaust port and multiple attachment target holes, the multiple attachment target holes being provided on an outer circumference of the intake/exhaust port, and a duct cover configured to be attached to the case in multiple orientations and having formed therein a connection opening connecting to the intake/exhaust port, an external opening communicating with the connection opening, and multiple attachment holes, the multiple attachment holes being provided on an outer circumference of the connection opening.Type: ApplicationFiled: August 28, 2023Publication date: February 29, 2024Inventor: Kohei MIURA
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Publication number: 20230254460Abstract: A projector includes an optical apparatus, a control circuit board disposed above an upper side of the optical apparatus, a cooling fan disposed near a rear surface outside air inlet port in a case which lies opposite to a projection direction and having an upper surface outside air inlet port configured to let in outside air from an upper surface and a lower surface outside air inlet port configured to let in outside air from a lower surface of the case, and a heat sink provided corresponding to a discharge port of the cooling fan and connected with the optical apparatus, and a flow path resistance on a side facing the lower surface outside air inlet port is smaller than a flow path resistance on a side facing the upper surface outside air inlet port.Type: ApplicationFiled: March 22, 2023Publication date: August 10, 2023Applicant: CASIO COMPUTER CO., LTD.Inventors: Kohei MIURA, Tomoyuki UEDA, Hirofumi FUJIKURA
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Publication number: 20200310232Abstract: A control unit includes a casing, a first exhaust fan disposed close to a first side surface of the casing to exhaust air inside the casing, a first air intake port disposed to correspond to the first exhaust fan and formed in a second side surface opposite to the first side surface, a second exhaust fan disposed adjacent to the first exhaust fan and close to the first side surface to exhaust air inside the casing, a second air intake port disposed to correspond to the second exhaust fan and formed in the second side surface, a first cooling target object disposed to correspond to the first exhaust fan, a second cooling target object disposed to correspond to the second exhaust fan, and a CPU for controlling a revolution speed of the first exhaust fan and a revolution speed of the second exhaust fan.Type: ApplicationFiled: March 19, 2020Publication date: October 1, 2020Inventors: Kohei Miura, Tomoyuki Ueda, Kiyohiko Inoue
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Patent number: 10297701Abstract: An optical switching device includes: an optical absorbing layer having a first superlattice structure and responding to an incident light; an excitation layer having a second superlattice structure and producing an electron by thermal excitation; and a barrier layer having a third superlattice structure, the optical absorbing layer and the barrier layer enabling a first band offset and a second band offset to form a well in a conduction band of the second superlattice structure of the excitation layer with reference to a conduction band of the first superlattice structure of the optical absorbing layer and a conduction band of the third superlattice structure of the barrier layer, respectively.Type: GrantFiled: January 30, 2018Date of Patent: May 21, 2019Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Sundararajan Balasekaran, Kohei Miura
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Publication number: 20180219114Abstract: An optical switching device includes: an optical absorbing layer having a first superlattice structure and responding to an incident light; an excitation layer having a second superlattice structure and producing an electron by thermal excitation; and a barrier layer having a third superlattice structure, the optical absorbing layer and the barrier layer enabling a first band offset and a second band offset to form a well in a conduction band of the second superlattice structure of the excitation layer with reference to a conduction band of the first superlattice structure of the optical absorbing layer and a conduction band of the third superlattice structure of the barrier layer, respectively.Type: ApplicationFiled: January 30, 2018Publication date: August 2, 2018Applicant: Sumitomo Electric Industries, Ltd.Inventors: Sundararajan BALASEKARAN, Kohei MIURA
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Patent number: 9941431Abstract: A photodiode includes a light absorbing layer including a first superlattice structure that includes first semiconductor layers and second semiconductor layers, the first superlattice structure having a band structure sensitive to infrared light; a p-type semiconductor region; and an intermediate layer disposed between the p-type semiconductor region and the light absorbing layer, the intermediate layer having a conduction band having a bottom energy level lower than that of the p-type semiconductor region.Type: GrantFiled: December 8, 2016Date of Patent: April 10, 2018Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kohei Miura, Yasuhiro Iguchi
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Patent number: 9685570Abstract: A light receiving apparatus includes a light receiving device including a compound semiconductor substrate, photodiodes, and bump electrodes; and a semiconductor integrated device including a silicon substrate and read-out circuits. Bonded, the integrated device and the light receiving device face each other in a direction of a first axis through the bump electrodes. The light receiving device has a back surface with first and second back edges extending in a direction of a second axis intersecting with the first axis. The light receiving device has a first slope face extending from the first back edge along a first reference plane, and a second slope face extending from the second back edge along a second reference plane. The back surface of the light receiving device extends along a third reference plane intersecting with the first axis. The first and second reference planes are inclined with respect to the third reference plane.Type: GrantFiled: August 3, 2016Date of Patent: June 20, 2017Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kohei Miura, Yasuhiro Iguchi
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Publication number: 20170170347Abstract: A photodiode includes a light absorbing layer including a first superlattice structure that includes first semiconductor layers and second semiconductor layers, the first superlattice structure having a band structure sensitive to infrared light; a p-type semiconductor region; and an intermediate layer disposed between the p-type semiconductor region and the light absorbing layer, the intermediate layer having a conduction band having a bottom energy level lower than that of the p-type semiconductor region.Type: ApplicationFiled: December 8, 2016Publication date: June 15, 2017Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kohei MIURA, Yasuhiro IGUCHI
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Publication number: 20170040476Abstract: A light receiving apparatus includes a light receiving device including a compound semiconductor substrate, photodiodes, and bump electrodes; and a semiconductor integrated device including a silicon substrate and read-out circuits. The integrated device is bonded with the light receiving device to face each other in a direction of a first axis through the bump electrodes. The light receiving device has a back surface with first and second back edges extending in a direction of a second axis intersecting with the first axis. The light receiving device has a first slope face extending from the first back edge along a first reference plane, and a second slope face extending from the second back edge along a second reference plane. The back surface of the light receiving device extends along a third reference plane intersecting with the first axis. The first and second reference planes are inclined with the third reference plane.Type: ApplicationFiled: August 3, 2016Publication date: February 9, 2017Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kohei MIURA, Yasuhiro Iguchi
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Patent number: 9391229Abstract: Provided are a light receiving element etc. which have a high responsivity over the near- to mid-infrared region and stably have a high quality while maintaining the economical efficiency. The light receiving element includes an InP substrate that is transparent to light having a wavelength of 3 to 12 ?m, a middle layer that is epitaxially grown on the InP substrate, a GaSb buffer layer located in contact with the middle layer, and a light-receiving layer that is epitaxially grown on the GaSb buffer layer and that has a type-II multiple quantum well structure. The GaSb buffer layer is epitaxially grown on the middle layer while exceeding a range of a normal lattice-matching condition.Type: GrantFiled: May 16, 2013Date of Patent: July 12, 2016Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kohei Miura, Hiroshi Inada, Yasuhiro Iguchi, Tadashi Saito
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Patent number: 9312422Abstract: A light receiving element includes an InP substrate that is transparent to light having a wavelength of 3 to 12 ?m, a buffer layer located in contact with the InP substrate, and a light-receiving layer having a multiple quantum well structure, the light-receiving layer having a cutoff wavelength of 3 ?m or more and being lattice-matched with the buffer layer. In the light receiving element, the buffer layer is epitaxially grown on the InP substrate while the buffer layer and the InP substrate exceed a range of a normal lattice-matching condition, and the buffer layer is constituted by a GaSb layer.Type: GrantFiled: November 29, 2011Date of Patent: April 12, 2016Assignee: Sumitomo Electric Industries, Ltd.Inventors: Kohei Miura, Hiroshi Inada, Yasuhiro Iguchi, Tadashi Saito
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Publication number: 20140312304Abstract: Provided are a light receiving element etc. which have a high responsivity over the near- to mid-infrared region and stably have a high quality while maintaining the economical efficiency. The light receiving element includes an InP substrate that is transparent to light having a wavelength of 3 to 12 ?m, a middle layer that is epitaxially grown on the InP substrate, a GaSb buffer layer located in contact with the middle layer, and a light-receiving layer that is epitaxially grown on the GaSb buffer layer and that has a type-II multiple quantum well structure. The GaSb buffer layer is epitaxially grown on the middle layer while exceeding a range of a normal lattice-matching condition.Type: ApplicationFiled: May 16, 2013Publication date: October 23, 2014Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Kohei Miura, Hiroshi Inada, Yasuhiro Iguchi, Tadashi Saito
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Patent number: 8729527Abstract: A light-receiving element includes a group III-V compound semiconductor stacked structure that includes an absorption layer having a pn-junction therein. The stacked structure is formed on a group III-V compound semiconductor substrate. The absorption layer has a multiquantum well structure composed of group III-V compound semiconductors, and the pn-junction is formed by selectively diffusing an impurity element into the absorption layer. A diffusion concentration distribution control layer composed of a III-V group semiconductor is disposed in contact with the absorption layer on a side of the absorption layer opposite the side adjacent to the group III-V compound semiconductor substrate. The bandgap energy of the diffusion concentration distribution control layer is smaller than that of the group III-V compound semiconductor substrate. The concentration of the impurity element selectively diffused in the diffusion concentration distribution control layer is 5×1016/cm3 or less toward the absorption layer.Type: GrantFiled: April 19, 2012Date of Patent: May 20, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yasuhiro Iguchi, Kohei Miura, Hiroshi Inada, Youichi Nagai
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Publication number: 20130248821Abstract: A light receiving element includes an InP substrate that is transparent to light having a wavelength of 3 to 12 ?m, a buffer layer located in contact with the InP substrate, and a light-receiving layer having a multiple quantum well structure, the light-receiving layer having a cutoff wavelength of 3 ?m or more and being lattice-matched with the buffer layer. In the light receiving element, the buffer layer is epitaxially grown on the InP substrate while the buffer layer and the InP substrate exceed a range of a normal lattice-matching condition, and the buffer layer is constituted by a GaSb layer.Type: ApplicationFiled: November 29, 2011Publication date: September 26, 2013Applicant: Sumitomo Electric Industries, Ltd.Inventors: Kohei Miura, Hiroshi Inada, Yasuhiro Iguchi, Tadashi Saito
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Publication number: 20120223290Abstract: A light-receiving element includes a group III-V compound semiconductor stacked structure that includes an absorption layer having a pn-junction therein. The stacked structure is formed on a group III-V compound semiconductor substrate. The absorption layer has a multi- quantum well structure composed of group III-V compound semiconductors, and the pn-junction is formed by selectively diffusing an impurity element into the absorption layer. A diffusion concentration distribution control layer composed of a III-V group semiconductor is disposed in contact with the absorption layer on a side of the absorption layer opposite the side adjacent to the group III-V compound semiconductor substrate. The bandgap energy of the diffusion concentration distribution control layer is smaller than that of the group III-V compound semiconductor substrate. The concentration of the impurity element selectively diffused in the diffusion concentration distribution control layer is 5×1016/cm3 or less toward the absorption layer.Type: ApplicationFiled: April 19, 2012Publication date: September 6, 2012Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yasuhiro Iguchi, Kohei Miura, Hiroshi Inada, Youichi Nagai
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Patent number: 8188559Abstract: Provided are a light-receiving element which has sensitivity in the near-infrared region and in which a good crystal quality is easily obtained, a one-dimensional or two-dimensional array of the light-receiving elements is easily formed with a high accuracy, and a dark current can be reduced; a light-receiving element array; and methods for producing the same. A light-receiving element includes a group III-V compound semiconductor stacked structure including an absorption layer 3 having a pn-junction 15 therein, wherein the absorption layer has a multiquantum well structure composed of group III-V compound semiconductors, the pn-junction 15 is formed by selectively diffusing an impurity element into the absorption layer, and the concentration of the impurity element in the absorption layer is 5×1016 cm?3 or less.Type: GrantFiled: July 24, 2009Date of Patent: May 29, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yasuhiro Iguchi, Kohei Miura, Hiroshi Inada, Youichi Nagai
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Publication number: 20110140082Abstract: Provided are a light-receiving element which has sensitivity in the near-infrared region and in which a good crystal quality is easily obtained, a one-dimensional or two-dimensional array of the light-receiving elements is easily formed with a high accuracy, and a dark current can be reduced; a light-receiving element array; and methods for producing the same. A light-receiving element includes a group III-V compound semiconductor stacked structure including an absorption layer 3 having a pn-junction 15 therein, wherein the absorption layer has a multiquantum well structure composed of group III-V compound semiconductors, the pn-junction 15 is formed by selectively diffusing an impurity element into the absorption layer, and the concentration of the impurity element in the absorption layer is 5×1016 cm?3 or less.Type: ApplicationFiled: July 24, 2009Publication date: June 16, 2011Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yasuhiro Iguchi, Kohei Miura, Hiroshi Inada, Youichi Nagai
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Publication number: 20080260264Abstract: The present invention relates to a method and system for generating aesthetic characters, and to a business model for commercially developing the method and system utilizing the Internet or the like. The present invention makes it possible to synthesize a variety of image patterns with arbitrary characters by adding stroke fonts. According to a first aspect, the present invention provides a method and system for generating aesthetic characters, in which an arbitrary image pattern is selected from a pattern database, and data on arbitrary characters constituting single lines are superposed on the selected image pattern, whereby the arbitrary image patterns are processed into various characters and generating aesthetic image patterns. Thus, it is possible to provide character bodies drawn with excellent aesthetic properties that are uniquely designed for attracting public attention, such as in the television broadcasts, Internet sites, headings of journals or newspapers, advertisements, and signboards.Type: ApplicationFiled: April 18, 2007Publication date: October 23, 2008Inventors: Kohei Miura, Kouzaburou Furukawa, Atsumu Yokoishi, Akira Itoh, Yukiko Okada, Hajime Hasegawa