Patents by Inventor Kohei Nishiguchi

Kohei Nishiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11335594
    Abstract: A method for manufacturing a semiconductor device (10) includes, in the following order: forming a first insulating film (14) on a semiconductor substrate (12); forming, on the first insulating film (14), wiring in which at least the uppermost layer is made of Au (16); implanting ions, which do not impair insulating properties even when implanted into the insulating film (14), into the upper surface of the wiring (16) and a region not covered with the wiring (16) on the upper surface of the first insulating film (14); and forming a second insulating film (18) that covers the wiring (16).
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: May 17, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Nishiguchi
  • Publication number: 20220013408
    Abstract: A method for manufacturing a semiconductor device (10) includes, in the following order: forming a first insulating film (14) on a semiconductor substrate (12); forming, on the first insulating film (14), wiring in which at least the uppermost layer is made of Au (16); implanting ions, which do not impair insulating properties even when implanted into the insulating film (14), into the upper surface of the wiring (16) and a region not covered with the wiring (16) on the upper surface of the first insulating film (14); and forming a second insulating film (18) that covers the wiring (16).
    Type: Application
    Filed: March 25, 2019
    Publication date: January 13, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei NISHIGUCHI
  • Publication number: 20210384312
    Abstract: Provided herein is: a SiC substrate having a front surface on which a GaN layer is stacked; a source electrode formed on a front surface of the GaN layer; a MIM capacitor formed on a front surface of the source electrode; and a via hole extending from a rear surface of the SiC substrate to reach the source electrode; wherein a barrier metal layer is included in the source electrode, and wherein the depth end of the via hole is placed between a rear surface of the source electrode and a rear surface of the barrier metal layer. Accordingly, intrusion of a halogen element, in particular, Br, into an insulating film that is placed in the MIM capacitor, is suppressed over a long term.
    Type: Application
    Filed: December 27, 2018
    Publication date: December 9, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kohei MIKI, Shinichi MIYAKUNI, Kohei NISHIGUCHI
  • Patent number: 11171005
    Abstract: Included are forming, on a semiconductor substrate, an insulation film having an opening section where an opening is formed, forming a first resist on the insulation film while avoiding the opening section and the semiconductor substrate exposed via the opening section, forming a first metal on the opening section, the semiconductor substrate exposed via the opening section, and the first resist by a vapor deposition method or a sputtering method, removing, by a lift-off method, the first resist and the first metal on the first resist, forming, on the insulation film, a second resist allowing the first metal to be exposed, causing the first metal to grow a second metal by an electroless plating method, and removing the second resist, where these processings are included in the listed order.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: November 9, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Nishiguchi
  • Publication number: 20200357644
    Abstract: Included are forming, on a semiconductor substrate, an insulation film having an opening section where an opening is formed, forming a first resist on the insulation film while avoiding the opening section and the semiconductor substrate exposed via the opening section, forming a first metal on the opening section, the semiconductor substrate exposed via the opening section, and the first resist by a vapor deposition method or a sputtering method, removing, by a lift-off method, the first resist and the first metal on the first resist, forming, on the insulation film, a second resist allowing the first metal to be exposed, causing the first metal to grow a second metal by an electroless plating method, and removing the second resist, where these processings are included in the listed order.
    Type: Application
    Filed: June 7, 2017
    Publication date: November 12, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei NISHIGUCHI
  • Patent number: 10249500
    Abstract: A substrate for semiconductor device includes a substrate, a reaction layer provided on a back surface of the substrate, a transmission preventing metal having a transmittance with respect to red light or infrared light lower than that of the substrate and a material of the substrate being mixed in the reaction layer, and a metal thin film layer formed on a back surface of the reaction layer and formed of the same material as the transmission preventing metal.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 2, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Nishiguchi
  • Publication number: 20180226253
    Abstract: A substrate for semiconductor device includes a substrate, a reaction layer provided on a back surface of the substrate, a transmission preventing metal having a transmittance with respect to red light or infrared light lower than that of the substrate and a material of the substrate being mixed in the reaction layer, and a metal thin film layer formed on a back surface of the reaction layer and formed of the same material as the transmission preventing metal.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei NISHIGUCHI
  • Patent number: 9966264
    Abstract: A substrate for semiconductor device includes a substrate, a reaction layer provided on a back surface of the substrate, a transmission preventing metal having a transmittance with respect to red light or infrared light lower than that of the substrate and a material of the substrate being mixed in the reaction layer, and a metal thin film layer formed on a back surface of the reaction layer and formed of the same material as the transmission preventing metal.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: May 8, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Kohei Nishiguchi
  • Patent number: 9691722
    Abstract: A surface mount high-frequency circuit is configured such that a plurality of ground pads 41 and a plurality of external connection ground conductors 51 are discretely disposed to surround a signal line pad 42 and an external connection signal line conductor 52, and a plurality of interlayer connection ground conductors 31 and that a plurality of columnar ground conductors 12 are discretely disposed to surround an interlayer connection signal line conductor 32. Thus, it is possible to suppress radiation of an unnecessary signal to the outside using a simple production process that is completed by only a wafer process without separately preparing a component such as a shield cover case.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: June 27, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeshi Yuasa, Kiyoshi Ishida, Yoshihiro Tsukahara, Kohei Nishiguchi
  • Publication number: 20170077049
    Abstract: A surface mount high-frequency circuit is configured such that a plurality of ground pads 41 and a plurality of external connection ground conductors 51 are discretely disposed to surround a signal line pad 42 and an external connection signal line conductor 52, and a plurality of interlayer connection ground conductors 31 and that a plurality of columnar ground conductors 12 are discretely disposed to surround an interlayer connection signal line conductor 32. Thus, it is possible to suppress radiation of an unnecessary signal to the outside using a simple production process that is completed by only a wafer process without separately preparing a component such as a shield cover case.
    Type: Application
    Filed: March 26, 2014
    Publication date: March 16, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takeshi YUASA, Kiyoshi ISHIDA, Yoshihiro TSUKAHARA, Kohei NISHIGUCHI
  • Publication number: 20160218017
    Abstract: A substrate for semiconductor device includes a substrate, a reaction layer provided on a back surface of the substrate, a transmission preventing metal having a transmittance with respect to red light or infrared light lower than that of the substrate and a material of the substrate being mixed in the reaction layer, and a metal thin film layer formed on a back surface of the reaction layer and formed of the same material as the transmission preventing metal.
    Type: Application
    Filed: October 26, 2015
    Publication date: July 28, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventor: Kohei NISHIGUCHI
  • Patent number: 8020458
    Abstract: In a sample introducing system that can be easily adapted to a variety of analytical conditions without being affected by a flow rate of gas introduced into an analytical device, can introduce an analytical sample into the analytical device without loss, and can contribute to a simple and highly accurate high-sensitivity analysis, a pretreatment device removes unnecessary components from an untreated sample gas containing the analytical sample. A treated sample gas that has been pretreated by the pretreatment device is introduced into the analytical device via a connection gas flow channel. A gas addition device that adds a carrier gas to the treated sample gas flowing toward the analytical device in the connection gas flow channel has a means for changing the addition flow rate of the carrier gas. Pressure fluctuations of the gas containing the analytical sample are restricted by a pressure adjusting device upstream of the gas addition device.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: September 20, 2011
    Assignee: Sumitomo Seika Chemicals Co., Ltd
    Inventors: Keisuke Utani, Kohei Nishiguchi
  • Publication number: 20110133074
    Abstract: Analytical method and analytical system are presented, wherein properties of the carrier gas conveying fine particles and gas components generated by laser ablation can be prevented from inhibiting the optimization of analysis conditions, and plural kinds of elements can be stably measured with high sensitivity and good accuracy without losing operability, speed, and convenience when fine particles generated by laser ablation are plasma-analyzed. A sample ? is converted into fine particles by a laser ablation device in the atmosphere of a first gas. The fine particles are conveyed from the laser ablation device to a gas replacement device by using the first gas as a carrier gas. The first gas of at least part of the carrier gas conveying the fine particles is replaced with a second gas by means of the gas replacement device. The fine particles are conveyed from the gas replacement device to the plasma analyzer by the carrier gas that has been subjected to the gas replacement.
    Type: Application
    Filed: July 22, 2009
    Publication date: June 9, 2011
    Inventors: Hideki Nakanishi, Keisuke Utani, Kohei Nishiguchi
  • Publication number: 20090173171
    Abstract: In a sample introducing system that can be easily adapted to a variety of analytical conditions without being affected by a flow rate of gas introduced into an analytical device, can introduce an analytical sample into the analytical device without loss, and can contribute to a simple and highly accurate high-sensitivity analysis, a pretreatment device removes unnecessary components from an untreated sample gas containing the analytical sample. A treated sample gas that has been pretreated by the pretreatment device is introduced into the analytical device via a connection gas flow channel. A gas addition device that adds a carrier gas to the treated sample gas flowing toward the analytical device in the connection gas flow channel has a means for changing the addition flow rate of the carrier gas. Pressure fluctuations of the gas containing the analytical sample are restricted by a pressure adjusting device upstream of the gas addition device.
    Type: Application
    Filed: March 30, 2007
    Publication date: July 9, 2009
    Applicant: Sumitomo Seika Chemicals Co., Ltd.
    Inventors: Keisuke Utani, Kohei Nishiguchi