Patents by Inventor Kohei NYUI

Kohei NYUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12490435
    Abstract: A semiconductor storage device includes: a first semiconductor layer through first conductive layers; a gate insulating film between the first conductive layers and the first semiconductor layer; a first structure facing the first conductive layers; a second semiconductor layer connected to the first semiconductor layer and the first structure; a third semiconductor layer between the second semiconductor layer and the first conductive layers; a fourth semiconductor layer including a first portion along a bottom surface of the third semiconductor layer and a second portion along a top surface of the second semiconductor layer; and a first insulating layer, between the first and second portions, including a first region spaced from the first structure with a distance longer than a first distance that contains a nitride film, and a second region spaced from the first structure with a distance shorter than the first distance that does not contain nitrogen.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: December 2, 2025
    Assignee: KIOXIA CORPORATION
    Inventors: Hideto Takekida, Keisuke Suda, Naoyuki Iida, Kohei Nyui, Ryo Hikida
  • Publication number: 20230276626
    Abstract: A semiconductor storage device includes: a first semiconductor layer through first conductive layers; a gate insulating film between the first conductive layers and the first semiconductor layer; a first structure facing the first conductive layers; a second semiconductor layer connected to the first semiconductor layer and the first structure; a third semiconductor layer between the second semiconductor layer and the first conductive layers; a fourth semiconductor layer including a first portion along a bottom surface of the third semiconductor layer and a second portion along a top surface of the second semiconductor layer; and a first insulating layer, between the first and second portions, including a first region spaced from the first structure with a distance longer than a first distance that contains a nitride film, and a second region spaced from the first structure with a distance shorter than the first distance that does not contain nitrogen.
    Type: Application
    Filed: August 30, 2022
    Publication date: August 31, 2023
    Applicant: Kioxia Corporation
    Inventors: Hideto TAKEKIDA, Keisuke SUDA, Naoyuki IIDA, Kohei NYUI, Ryo HIKIDA
  • Patent number: 10937803
    Abstract: According to one embodiment, a semiconductor storage device includes a stacked body, a first semiconductor layer extending in the stacked body, a first charge storage layer disposed between the plurality of first conductor layers and the first semiconductor layer, a second conductor layer disposed above the stacked body, a second semiconductor layer extending through the second conductor layer, a third conductor layer disposed between the second semiconductor layer and the second conductor layer, a first insulator layer disposed above the third conductor layer, and a second insulator layer including a first portion disposed between the second semiconductor layer and the third conductor layer and a second portion disposed between the second semiconductor layer and the first insulator layer. A diameter of the second insulator layer is larger in the second portion than in the first portion.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: March 2, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki Kashima, Kohei Nyui, Kotaro Fujii, Hiroyuki Yamasaki
  • Publication number: 20200273876
    Abstract: According to one embodiment, a semiconductor storage device includes a stacked body, a first semiconductor layer extending in the stacked body, a first charge storage layer disposed between the plurality of first conductor layers and the first semiconductor layer, a second conductor layer disposed above the stacked body, a second semiconductor layer extending through the second conductor layer, a third conductor layer disposed between the second semiconductor layer and the second conductor layer, a first insulator layer disposed above the third conductor layer, and a second insulator layer including a first portion disposed between the second semiconductor layer and the third conductor layer and a second portion disposed between the second semiconductor layer and the first insulator layer. A diameter of the second insulator layer is larger in the second portion than in the first portion.
    Type: Application
    Filed: August 2, 2019
    Publication date: August 27, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki KASHIMA, Kohei NYUI, Kotaro FUJII, Hiroyuki YAMASAKI
  • Publication number: 20200185403
    Abstract: A semiconductor memory device according to an embodiment includes first and second conductive layers and first and second pillar. The first pillar penetrates the first conductive layers, and includes one part of a first semiconductor layer. The second pillar penetrates the second conductive layer and is provided on the first pillar. The second pillar includes another part of the first semiconductor layer. An area of the second pillar is smaller than an area of the first pillar. The first semiconductor layer includes a first portion facing an uppermost one of the first conductive layers and a second portion facing the second conductive layer. The first semiconductor layer is continuous at least from the first portion to the second portion.
    Type: Application
    Filed: July 26, 2019
    Publication date: June 11, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Kohei NYUI, Takayuki KASHIMA