Patents by Inventor Kohei Oasa

Kohei Oasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998437
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g·?m·cm?3])/(density of the first metal material [g·cm?3]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g·?m·cm?3])/(density of the second metal material [g·cm?3]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode pr
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: May 4, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya Ohguro, Tatsuya Nishiwaki, Hideharu Kojima, Yoshiharu Takada, Kikuo Aida, Kentaro Ichinoseki, Kohei Oasa, Shingo Sato
  • Patent number: 10971621
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 6, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Publication number: 20200295180
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor layer including a first plane extending along a plane including a first axis and a second axis; a first electrode extending along the first axis; a second electrode extending along the second axis; and a third electrode above the first plane. The third electrode is electrically coupled to the first electrode and the second electrode, and includes a first portion, a second portion and a third portion. The first portion crosses the first electrode. The second portion crosses the second electrode. The third portion crosses the second electrode and is separate at a first end from the second portion.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventors: Kentaro ICHINOSEKI, Tatsuya NISHIWAKI, Kikuo AIDA, Kohei OASA
  • Patent number: 10763352
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: September 1, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kohei Oasa, Kikuo Aida
  • Publication number: 20200266293
    Abstract: A semiconductor device includes a semiconductor body, first and second electrodes, and first and second control electrodes. The first and second electrodes are provided on the semiconductor body. The first and second control electrodes each include a first portion positioned between the semiconductor body and the first electrode, a second portion positioned between the semiconductor body and the second electrode, and a third portion linked to the first and second portions. The semiconductor body includes first to fourth semiconductor layers. The second semiconductor layer is provided on the first semiconductor layer, and extends along the first to third portions. The fourth semiconductor layer is provided selectively on the second semiconductor layer, and extends along the second and third portions. The fourth semiconductor layer includes second conductivity-type impurities with a higher concentration than a concentration of second conductivity-type impurities in the second semiconductor layer.
    Type: Application
    Filed: August 16, 2019
    Publication date: August 20, 2020
    Inventors: Hiroaki Katou, Tatsuya Nishiwaki, Kohei Oasa, Toshifumi Nishiguchi
  • Patent number: 10707312
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: July 7, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Hiroshi Matsuba, Hung Hung, Tatsuya Nishiwaki, Kikuo Aida, Kohei Oasa
  • Publication number: 20200152785
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first plane and a second plane, a semiconductor element provided in the semiconductor substrate, the semiconductor element including a gate insulating film provided in the first plane, a first electrode provided on the first plane, a second electrode provided on the first electrode, the second electrode including a first metal material, the second electrode having a film thickness of (65 [g·?m·cm?3])/(density of the first metal material [g·cm?3]) or more, a first solder portion provided on the second electrode, a third electrode provided on the first solder portion, a fourth electrode provided on the first plane, a fifth electrode provided on the fourth electrode, the fifth electrode including a second metal material, the fifth electrode having a film thickness of (65 [g·m·cm?3])/(density of the second metal material [g·cm?3]) or more, a second solder portion provided on the fifth electrode, and a sixth electrode pro
    Type: Application
    Filed: August 5, 2019
    Publication date: May 14, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsuya OHGURO, Tatsuya NISHIWAKI, Hideharu KOJIMA, Yoshiharu TAKADA, Kikuo AIDA, Kentaro ICHINOSEKI, Kohei OASA, Shingo SATO
  • Patent number: 10651276
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: May 12, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Hung Hung, Kikuo Aida, Kentaro Ichinoseki
  • Patent number: 10593793
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: March 17, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya Nishiwaki, Kohei Oasa, Hiroshi Matsuba, Kikuo Aida, Hung Hung
  • Publication number: 20190296116
    Abstract: According to one embodiment, there is provided a semiconductor device including a semiconductor substrate, a plurality of first columnar bodies having a peripheral edge, each of the columnar bodies spaced from one another on the semiconductor substrate, each including a first conductive layer extending from an upper end thereof in the depth direction of the semiconductor substrate, a base layer deposited about an outer peripheral surface of an upper end of the plurality of first columnar bodies, a gate adjacent to the base layer with a gate insulating film therebetween, a source layer connected to the base layer, and a second columnar body, including a second conductive layer, surrounding an outer peripheral edge of the plurality of first columnar bodies and extending in the depth direction of the semiconductor substrate.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 26, 2019
    Inventors: Hiroshi MATSUBA, Hung HUNG, Tatsuya NISHIWAKI, Kikuo AIDA, Kohei OASA
  • Publication number: 20190288071
    Abstract: A semiconductor device has a cell which includes a first semiconductor region of a first conductive type, a base region of a second conductive type on the first semiconductor region, a source region of the first conductive type on the base region, a gate electrode penetrating through the base region in a first direction to reach the first semiconductor region and extending in a second direction, and a gate insulting film between the gate electrode and the first semiconductor region, between the gate electrode and the base region, and between the gate electrode and the source region. The cell has a region having a first threshold voltage and a region having a second threshold voltage higher than the first threshold voltage.
    Type: Application
    Filed: September 12, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Kohei OASA, Hiroshi MATSUBA, Hung HUNG, Kikuo AIDA, Kentaro ICHINOSEKI
  • Publication number: 20190288103
    Abstract: A semiconductor device according to an embodiment includes: a first semiconductor region of a first conductive type; a base region of a second conductive type; gate electrodes penetrating through the base region to reach the first semiconductor region; gate insulating films around the plurality of gate electrodes; a first region having a source region of the first conductive type, among a plurality of regions between the plurality of gate insulating films; a second region not having the source region among the plurality of regions, the second region being located in a terminal region of the first region; a first contact of a first width in the first region and electrically connecting the base region and a source electrode; and a second contact of a second width larger than the first width, the second contact being in the second region and electrically connecting the base region and the source electrode.
    Type: Application
    Filed: September 10, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuya NISHIWAKI, Kohei OASA, Hiroshi MATSUBA, Kikuo AIDA, Hung HUNG
  • Publication number: 20190259871
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type having first and second surfaces and an impurity concentration distribution in a first direction from the second surface to the first surface, a first semiconductor region of a second conductivity between the semiconductor layer and the first surface, a second semiconductor region of a first conductivity type between the first semiconductor region and the first surface side, a first trench extending from the first surface into the semiconductor layer, a first electrode located in the first trench over a first insulating film and spaced from the first semiconductor region by a first insulating film, a second electrode located in the first trench over a second insulating film, a second trench extending from the first surface into the semiconductor layer and surrounding the first trench, and a third electrode located in the second trench over a third insulating film.
    Type: Application
    Filed: August 31, 2018
    Publication date: August 22, 2019
    Inventors: Hiroshi MATSUBA, Hung HUNG, Tatsuya NISHIWAKI, Kohei OASA, Kikuo AIDA
  • Publication number: 20190081173
    Abstract: A semiconductor device which includes a semiconductor layer, a first electrode, a second electrode, first trenches, a second trench surrounding the first trenches, a gate electrode and a first field plate electrode in the first trenches, a first insulating layer including a first portion p having a first film thickness, a second portion having a second film thickness thicker than the first film thickness, and a third portion having a third film thickness thicker than the second film thickness, a second field plate electrode in the second trench, a second insulating layer in the second trench. The semiconductor layer includes a first semiconductor region having a first conductivity type, a second semiconductor region having a second conductivity type, and a third semiconductor region having the second conductivity type.
    Type: Application
    Filed: February 23, 2018
    Publication date: March 14, 2019
    Inventors: Tatsuya NISHIWAKI, Kentaro ICHINOSEKI, Kikuo AIDA, Kohei OASA, Hung HUNG, Hiroshi MATSUBA
  • Patent number: 10074739
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: September 11, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Yoshioka, Kohei Oasa, Hung Hung, Yasuhiro Isobe
  • Publication number: 20180076311
    Abstract: A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.
    Type: Application
    Filed: February 24, 2017
    Publication date: March 15, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu SAITO, Kohei OASA, Takuo KIKUCHI, Junji KATAOKA, Tatsuya SHIRAISHI, Akira YOSHIOKA, Kazuo SAKI
  • Patent number: 9917182
    Abstract: A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: March 13, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Kohei Oasa, Takuo Kikuchi, Junji Kataoka, Tatsuya Shiraishi, Akira Yoshioka, Kazuo Saki
  • Publication number: 20170271495
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.
    Type: Application
    Filed: August 22, 2016
    Publication date: September 21, 2017
    Inventors: Akira YOSHIOKA, Kohei OASA, Hung HUNG, Yasuhiro ISOBE
  • Patent number: 9627504
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, source and drain electrodes over the second semiconductor layer, a gate electrode, and a first field plate electrode. The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion thinner than the first semiconductor portion. The source and drain electrodes are electrically connected to the second semiconductor layer. The gate electrode is provided over the second semiconductor layer between the source electrode and the drain electrode. The first field plate electrode is provided over the second semiconductor layer and includes a portion that extends from a location over the gate electrode toward the drain electrode and has an end portion that is positioned over the second semiconductor portion.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: April 18, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohei Oasa, Akira Yoshioka, Yasuhiro Isobe
  • Patent number: 9627489
    Abstract: A semiconductor device includes a first semiconductor layer on a substrate, a second semiconductor layer containing an n-type dopant, on the first semiconductor layer, a third semiconductor layer having a resistance greater than a resistance of the second semiconductor layer, on the second semiconductor layer, a fourth semiconductor layer containing a nitride semiconductor, on the third semiconductor layer, and a fifth semiconductor layer containing a nitride semiconductor having a band gap greater than a band gap of the fourth semiconductor layer, on the fourth semiconductor layer.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: April 18, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hung Hung, Yasuhiro Isobe, Kohei Oasa, Akira Yoshioka