Patents by Inventor Kohei SAKAIKE
Kohei SAKAIKE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10636803Abstract: A semiconductor memory device includes a semiconductor member extending in a first direction, a first interconnect extending in a second direction crossing the first direction, and a first electrode disposed between the semiconductor member and the first interconnect. A curvature radius of a corner portion facing the semiconductor member in the first electrode is larger than a curvature radius of a corner portion facing the first interconnect in the first electrode.Type: GrantFiled: September 14, 2017Date of Patent: April 28, 2020Assignee: Toshiba Memory CorporationInventors: Tatsuya Kato, Fumitaka Arai, Kohei Sakaike, Satoshi Nagashima
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Patent number: 10103155Abstract: A semiconductor memory device according to an embodiment, includes a first semiconductor member, a second semiconductor member, an insulating member, a plurality of electrode films, a first electrode, and a second electrode. The first semiconductor member and the second semiconductor member are separated in a first direction and extending in a second direction. The second direction crosses the first direction. The insulating member is provided between the first semiconductor member and the second semiconductor member. The plurality of electrode films are arranged to be separated from each other along the second direction. Each of the electrode films surrounds the first semiconductor member, the second semiconductor member, and the insulating member when viewed from the second direction. The first electrode is provided between the first semiconductor member and the electrode film. The second electrode is provided between the second semiconductor member and the electrode film.Type: GrantFiled: March 3, 2017Date of Patent: October 16, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kohei Sakaike, Toshiyuki Iwamoto, Tatsuya Kato, Keisuke Kikutani, Fumitaka Arai, Satoshi Nagashima, Koichi Sakata, Yuta Watanabe
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Publication number: 20180269218Abstract: A semiconductor memory device includes a semiconductor member extending in a first direction, a first interconnect extending in a second direction crossing the first direction, and a first electrode disposed between the semiconductor member and the first interconnect. A curvature radius of a corner portion facing the semiconductor member in the first electrode is larger than a curvature radius of a corner portion facing the first interconnect in the first electrode.Type: ApplicationFiled: September 14, 2017Publication date: September 20, 2018Applicant: Toshiba Memory CorporationInventors: Tatsuya KATO, Fumitaka Arai, Kohei Sakaike, Satoshi Nagashima
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Patent number: 9847342Abstract: A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.Type: GrantFiled: September 16, 2016Date of Patent: December 19, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Nagashima, Katsumi Yamamoto, Kohei Sakaike, Tatsuya Kato, Keisuke Kikutani, Fumitaka Arai, Atsushi Murakoshi, Shunichi Takeuchi, Katsuyuki Sekine
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Publication number: 20170263615Abstract: A semiconductor memory device according to an embodiment, includes a first semiconductor member, a second semiconductor member, an insulating member, a plurality of electrode films, a first electrode, and a second electrode. The first semiconductor member and the second semiconductor member are separated in a first direction and extending in a second direction. The second direction crosses the first direction. The insulating member is provided between the first semiconductor member and the second semiconductor member. The plurality of electrode films are arranged to be separated from each other along the second direction. Each of the electrode films surrounds the first semiconductor member, the second semiconductor member, and the insulating member when viewed from the second direction. The first electrode is provided between the first semiconductor member and the electrode film. The second electrode is provided between the second semiconductor member and the electrode film.Type: ApplicationFiled: March 3, 2017Publication date: September 14, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Kohei SAKAIKE, Toshiyuki IWAMOTO, Tatsuya KATO, Keisuke KlKUTANI, Fumitaka ARAI, Satoshi NAGASHIMA, Koichi SAKATA, Yuta WATANABE
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Publication number: 20170263619Abstract: A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.Type: ApplicationFiled: September 16, 2016Publication date: September 14, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Satoshi NAGASHIMA, Katsumi YAMAMOTO, Kohei SAKAIKE, Tatsuya KATO, Keisuke KlKUTANI, Fumitaka ARAI, Atsushi MURAKOSHI, Shunichi TAKEUCHI, Katsuyuki SEKINE
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Patent number: 9343576Abstract: The present invention provides a thin film forming method. The method includes the steps of: providing a first substrate, of which a surface is covered with a thin film; forming a plurality of openings through the thin film; forming a hollow portion between the first substrate and the thin film by etching the first substrate through the openings; bringing the thin film into contact with a second substrate with a liquid interposed between the thin film and the second substrate; and heating the first substrate and/or the second substrate. In the step of heating, the liquid interposed between the thin film and the second substrate evaporates off, which results in that the thin film is separated from the first substrate and transferred onto the second substrate.Type: GrantFiled: August 7, 2015Date of Patent: May 17, 2016Assignee: Hiroshima UniversityInventors: Seiichiro Higashi, Kohei Sakaike, Yoshitaka Kobayashi, Shogo Nakamura, Muneki Akazawa
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Publication number: 20150349137Abstract: The present invention provides a thin film forming method. The method includes the steps of: providing a first substrate, of which a surface is covered with a thin film; forming a plurality of openings through the thin film; forming a hollow portion between the first substrate and the thin film by etching the first substrate through the openings; bringing the thin film into contact with a second substrate with a liquid interposed between the thin film and the second substrate; and heating the first substrate and/or the second substrate. In the step of heating, the liquid interposed between the thin film and the second substrate evaporates off, which results in that the thin film is separated from the first substrate and transferred onto the second substrate.Type: ApplicationFiled: August 7, 2015Publication date: December 3, 2015Inventors: Seiichiro HIGASHI, Kohei SAKAIKE, Yoshitaka KOBAYASHI, Shogo NAKAMURA, Muneki AKAZAWA