Abstract: The present technology relates to a display module manufacturing method and a display module that enable more suitable manufacturing of an LED display. The display module manufacturing method according to the present technology includes: forming, on a glass substrate, a resin layer in which a plurality of light-emitting elements arranged in an array and first wiring for driving the light-emitting elements are formed; and joining, before or after peeling the glass substrate from the resin layer, a printed circuit board, on which second wiring for driving the light-emitting elements is formed, to a surface of the resin layer opposite to a light extraction surface. The present technology can be applied to, for example, a large direct-view LED display that displays video content.

Abstract: The inkjet printing apparatus is configured to be able to execute a batch adjustment process of performing a plurality of times of adjustment processes related to printing in succession based on one instruction from an outside. The conveyance control unit maintains the conveyance speed at a first speed in a period when a chart printing process is performed and a period when a chart imaging process is performed. The conveyance control unit decreases the conveyance speed from the first speed to the second speed after the end of the chart imaging process in an adjustment process except for an adjustment process that is performed last in the batch adjustment process, and increases the conveyance speed from the second speed to the first speed before the start of the chart printing process in an adjustment process that is performed next.

Abstract: A medical support system according to an embodiment includes processing circuitry and a display. The processing circuitry acquires biometric data of a subject to be examined or treated. The processing circuitry generates information on the probability of success in cell production in the future based on biological samples of the subject, on the basis of the biometric data. The display displays information on the probability of success in cell production in the future.

Abstract: Disclosed is a semiconductor integrated circuit device including: a switching transistor connected between a voltage input terminal where DC voltage is input and a voltage output terminal; a discharging transistor connected between the voltage output terminal and a ground point; an external terminal where a control signal of an external device is input; and a control circuit including a logic circuit and controlling and turning on or off the switching transistor and the discharging transistor based on the control signal. Upon the control signal input to the external terminal being at a first logic level, the logic circuit generates a signal that turns on the switching transistor and turns off the discharging transistor. Upon the control signal being at a second logic level, the logic circuit generates a signal that turns off the switching transistor and turns on the discharging transistor.

Abstract: A current detecting circuit includes a first switching element, a second switching element, and a third switching element electrically coupled in series with the first switching element. An output side of the third switching element is electrically coupled to an output terminal. The current detecting circuit includes a current amplifier configured to detect a difference between a first output voltage of the first switching element and a second output voltage of the second switching element. The current amplifier outputs a relative current to be used for detecting an output current that flows out from the output terminal. A ratio of resistance associated with the first switching element to resistance associated with the second switching element is n:1.

Abstract: A power supply semiconductor IC includes: an output transistor connected between a voltage-input terminal and a voltage-output terminal; a control circuit that controls the output transistor based on a feedback voltage of an output voltage; a current-limit circuit that limits an output current of the output transistor such that the output current is not equal to or greater than a current limit; a first transistor constituting a current-mirror circuit with the output transistor; a short-circuit-fault detection circuit that detects a short circuit of the voltage-output terminal based on a voltage across a resistor connected in series to the first transistor; and a first output terminal that outputs a detection result of the short-circuit-fault detection circuit. The current limit is within a detection range of the short-circuit-fault detection circuit. The short-circuit-fault detection circuit detects a short circuit of the voltage-output terminal even while the current limit circuit limits the output current.

Abstract: An in-vehicle processing device includes: a signal input unit that generates input data based on an input signal from outside; a processing unit that executes arithmetic processing for calculating output data based on the input data; a signal output unit that generates an output signal based on the output data to output the output signal to the outside; and a storage unit that stores application software for causing the processing unit to execute the arithmetic processing. The application software includes: a data management layer for managing object data which is a collection of data corresponding to a given target element on the storage unit; a data adaptation layer for generating the object data based on the input data to output the generated object data to the data management layer; and a data operation layer for acquiring the object data from the data management layer to calculate the output data based on the acquired object data.

Abstract: A power supply semiconductor integrated circuit includes an output transistor, a control circuit, a first-fault detection circuit, a second-fault detection circuit, a delay circuit, and a latch circuit. The output transistor is connected between a voltage-input terminal to which a DC voltage is input and a voltage-output terminal. The control circuit controls the output transistor. The first-fault detection circuit detects a first fault. The second-fault detection circuit detects a second fault different from the first fault. The delay circuit delays an output of the first-fault detection circuit and an output of the second-fault detection circuit. The latch circuit captures and holds an output of the delay circuit. The delay circuit includes: a constant current source for charging a delay capacitor; a discharge switch for discharging the delay capacitor; and a voltage comparator circuit that compares a charge voltage across the delay capacitor and a predetermined voltage.

Abstract: A software update device is connected to a control device and includes an update control unit executing an update process of causing software for the control device to transit from a non-updated state to a completely updated state, a recovery control information managing unit acquiring recovery control information, and a recovery control unit executing a recovery process of causing the software to transit to the completely updated state on a basis of the recovery control information in a case where an abnormality in the update process has prevented the software from transiting to the completely updated state.

Abstract: The present invention makes it possible to reduce the volume of communication data necessary for updating the configuration of a circuit unit of a reconfigurable circuit device. In an vehicle control system 10 including an FPGA 3, the FPGA 3 includes a circuit unit including a reconfigurable circuit and a circuit SRAM that stores configuration information of the circuit unit. A transfer check unit that acquires a difference command regarding a change part of a circuit element in the circuit unit, and a data conversion unit 4 that updates the configuration information based on the difference command are provided. Further, in the vehicle control system 10, a non-volatile memory 6 that stores the configuration information to be stored in the circuit SRAM is further provided. The data conversion unit 4 may update the configuration information stored in the non-volatile memory 6 based on the difference command acquired by the transfer check unit.

Abstract: In the present invention, control feasibility in a vehicle control system architecture is efficiently determined by performing determination based on control feasibility in a physical element based on a converted parameter when a logical architecture is arranged in a physical architecture. The present invention includes: an arrangement unit 101 that arranges a logical architecture 601, which includes a linkage of each of logical functions and an execution time constraint of the linkage, in a physical architecture 300; a delay time calculation unit 104 that calculates a processing delay time based on a converted parameter when the logical architecture 601 is arranged in the physical architecture 300; and a verification unit 102 that verifies whether a total of the processing delay time satisfies the execution time constraint.

Abstract: The autonomous driving ECU includes a first communication unit that transmits and receives autonomous driving data to and from the plurality of data ECUs, and a vehicle control unit that controls a vehicle on the basis of the autonomous driving data transmitted from the plurality of data ECUs. Each data ECU includes a data construction unit that performs a construction of the autonomous driving data transmitted to the autonomous driving ECU, and a second communication unit that transmits and receives the autonomous driving data to and from the autonomous driving ECU. If a predetermined event occurs, among the data ECUs, the data construction unit of the data ECU in which the predetermined event occurs constructs the autonomous driving data so that a total amount of the autonomous driving data transmitted from the data ECU in which the predetermined event occurs is not greater than a predetermined amount of data.

Abstract: A power supply semiconductor integrated circuit includes an output transistor, a control circuit, a first-fault detection circuit, a second-fault detection circuit, a delay circuit, and a latch circuit. The output transistor is connected between a voltage-input terminal to which a DC voltage is input and a voltage-output terminal. The control circuit controls the output transistor. The first-fault detection circuit detects a first fault. The second-fault detection circuit detects a second fault different from the first fault. The delay circuit delays an output of the first-fault detection circuit and an output of the second-fault detection circuit. The latch circuit captures and holds an output of the delay circuit. The delay circuit includes: a constant current source for charging a delay capacitor; a discharge switch for discharging the delay capacitor; and a voltage comparator circuit that compares a charge voltage across the delay capacitor and a predetermined voltage.

Abstract: A current detecting circuit includes a first switching element, a second switching element, and a third switching element electrically coupled in series with the first switching element. An output side of the third switching element is electrically coupled to an output terminal. The current detecting circuit includes a current amplifier configured to detect a difference between a first output voltage of the first switching element and a second output voltage of the second switching element. The current amplifier outputs a relative current to be used for detecting an output current that flows out from the output terminal. A ratio of resistance associated with the first switching element to resistance associated with the second switching element is n:1.

Abstract: A power supply semiconductor IC includes: an output transistor connected between a voltage-input terminal and a voltage-output terminal; a control circuit that controls the output transistor based on a feedback voltage of an output voltage; a current-limit circuit that limits an output current of the output transistor such that the output current is not equal to or greater than a current limit; a first transistor constituting a current-mirror circuit with the output transistor; a short-circuit-fault detection circuit that detects a short circuit of the voltage-output terminal based on a voltage across a resistor connected in series to the first transistor; and a first output terminal that outputs a detection result of the short-circuit-fault detection circuit. The current limit is within a detection range of the short-circuit-fault detection circuit. The short-circuit-fault detection circuit detects a short circuit of the voltage-output terminal even while the current limit circuit limits the output current.

Abstract: A surface treatment method for a metal member includes the steps of: (a) imparting a charge to one region of the metal member; and (b) forming a first coating by applying a first coating material to the other region of the metal member, the first coating material containing an insulating resin.

Abstract: The purpose of the present invention is to provide a system in which the reliability of an automatic driving system can be excellently complemented by a different control system while the automatic driving system is effectively used. The vehicle control device outputs to a drive device one of a first control signal generated on the basis of automatic driving control information, and a second control signal generated on the basis of the relative information between a vehicle and a surrounding object. If an abnormality is detected in the automatic driving control information, the second control signal is output to the drive device in place of the first control signal.

Abstract: The present invention provides a technology for comprehensive verification of the safety of the design of functions, on the basis of a safety analysis result. The disclosed vehicle control system verification device is equipped with a storage device that stores programs for verifying the safety of the logical architecture of a vehicle control system, and a processor that reads the programs from the storage device and verifies the safety of the logical architecture. On the basis of safety analysis result information that is supplied, the processor executes a process for verifying whether the logical architecture has logical functions corresponding to the safety analysis result.

Abstract: In the present invention, control feasibility in a vehicle control system architecture is efficiently determined by performing determination based on control feasibility in a physical element based on a converted parameter when a logical architecture is arranged in a physical architecture. The present invention includes: an arrangement unit 101 that arranges a logical architecture 601, which includes a linkage of each of logical functions and an execution time constraint of the linkage, in a physical architecture 300; a delay time calculation unit 104 that calculates a processing delay time based on a converted parameter when the logical architecture 601 is arranged in the physical architecture 300; and a verification unit 102 that verifies whether a total of the processing delay time satisfies the execution time constraint.

Abstract: The present invention makes efficient development possible by providing a development support device that automatically establishes a network model, messages to be transmitted and received, etc. for a cooperative simulation that connects a plurality of development support devices. The present invention is characterized in that: a development support device generates a communication definition file in a format that can be read and executed by a development support device; and development support device reads the communication definition file and thereby automatically establishes messages to be transmitted and received by development support device.