Patents by Inventor Kohei Shimada

Kohei Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972909
    Abstract: A capacitor disposed inside a multilayer substrate that includes a conductive pattern on a surface thereof and an anode portion having a first conductive metal member and a porous portion disposed on a surface of the first conductive metal member, a cathode portion, and a dielectric layer disposed between the anode portion and the cathode portion. Moreover, the anode portion is led out to a surface side of the multilayer substrate by a connection electrode including an alloy layer containing a metal forming the first conductive metal member and a conductive layer disposed on the alloy layer, and in which the connection electrode is connected to the conductive pattern formed on the surface of the multilayer substrate.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: April 30, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazutaka Nakamura, Kohei Shimada, Takeshi Furukawa, Shinji Otani, Akitomo Takahashi
  • Publication number: 20230055804
    Abstract: The present invention is a powdered dispersant for hydraulic compositions containing a copolymer obtained by polymerizing raw material monomers containing a predetermined monomer 1 containing AO group with a number of added moles n falling within a predetermined range and a predetermined monomer 2 having a predetermined group such as a carboxylic acid group or the like, wherein a ratio of monomer 2 in the raw material monomers is 22 mass % or more, and a product of a value of n of monomer 1 and a value of mass % of the ratio is 420 or more and 2600 or less.
    Type: Application
    Filed: December 3, 2020
    Publication date: February 23, 2023
    Applicant: KAO CORPORATION
    Inventors: Yoshiaki SASHIHARA, Kohei SHIMADA
  • Publication number: 20230040757
    Abstract: The present invention is a method for producing a powder dispersant composition for hydraulic compositions including, drying a mixture containing a copolymer having constituent unit (1) represented by the following formula (1) and constituent unit (2) represented by the following formula (2) and water to produce a powder containing the copolymer, wherein: when the copolymer is a copolymer whose n in constituent unit (2) is less than 40, the mixture is dried by a thin film drying method or a spray drying method with a pH of 11 or more and 14 or less; when the copolymer is a copolymer whose n in constituent unit (2) is 40 or more and less than 80, the mixture is dried by a thin film drying method or a spray drying method with a pH of 9 or more and 14 or less; and when the copolymer is a copolymer whose n in constituent unit (2) is 80 or more, the mixture is dried by a thin film drying method or a spray drying method with a pH of 7 or more and 14 or less, wherein R1 and R3 are the same or different
    Type: Application
    Filed: December 23, 2020
    Publication date: February 9, 2023
    Applicant: KAO CORPORATION
    Inventors: Kohei SHIMADA, Keiichirou SAGAWA
  • Publication number: 20220165508
    Abstract: A capacitor disposed inside a multilayer substrate that includes a conductive pattern on a surface thereof and an anode portion having a first conductive metal member and a porous portion disposed on a surface of the first conductive metal member, a cathode portion, and a dielectric layer disposed between the anode portion and the cathode portion. Moreover, the anode portion is led out to a surface side of the multilayer substrate by a connection electrode including an alloy layer containing a metal forming the first conductive metal member and a conductive layer disposed on the alloy layer, and in which the connection electrode is connected to the conductive pattern formed on the surface of the multilayer substrate.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 26, 2022
    Inventors: Kazutaka NAKAMURA, Kohei SHIMADA, Takeshi FURUKAWA, Shinji OTANI, Akitomo TAKAHASHI
  • Patent number: 10650974
    Abstract: A multilayer ceramic capacitor includes a laminate with a rectangular or substantially rectangular parallelepiped shape and including dielectric layers, first internal electrode layers, and second internal electrode layers that are laminated; a first external electrode connected with the first internal electrode layers; and a second external electrode connected with the second internal electrode layers. Each of the first internal electrode layers or the second internal electrode layers has a coverage in a central portion in a W direction that is lower than a coverage within about 30.000 ?m from an end portion in the W direction, and has a shifting amount in the W direction of about 0.000 ?m or more and about 10.000 ?m or less.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: May 12, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kohei Shimada, Akio Masunari, Yuta Saito, Shunsuke Abe, Tomoo Yuguchi
  • Patent number: 10468186
    Abstract: A perovskite ceramic composition that contains Sn, Ba, and Ti, and where the Sn content is within a range of about 0.001 parts by mol?Sn?about 0.999 parts by mole with respect to 100 parts by mole of the Ti. The perovskite ceramic composition can be used in a composition that further includes a rare earth element R, Mn, and Si, and optionally Mg, where proportions of the R, the Mn, the Si, and the optional Mg, satisfy R: 0<R?about 10 parts by mole, Mn: 0<Mn?about 5 parts by mole, Si: 0<Si?about 5 parts by mole Mg: 0<Mg?about 5 parts by mole with respect to 100 parts by mole of Ti.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: November 5, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kohei Shimada, Katsuya Ishida
  • Patent number: 10405435
    Abstract: An electronic component is able to be mounted on a mounting substrate on which a first electronic component and a second electronic component are able to be mounted. When dimensions of the first electronic component and the second electronic component in a width direction is designated as W1 and W2, respectively, and dimensions of the first electronic component and the second electronic component in a length direction are designated as L1 and L2, respectively, dimensions of the electronic component in the width direction and the length direction are any one of combinations of W1 and L2, and of W2 and L1. The electronic component includes a third laminate and a pair of third external electrodes. Each of the pair of third external electrodes includes a fired layer, and a resin layer provided on an external surface of the fired layer.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: September 3, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masahiro Wakashima, Yuta Saito, Kohei Shimada, Naobumi Ikegami
  • Patent number: 10340083
    Abstract: An electronic component is able to be mounted on a mounting substrate including a pair of first edge portions that faces each other, and a pair of second edge portions that is perpendicular or substantially perpendicular to the pair of first edge portions and faces each other. The mounting substrate has a structure that allows at least any one of the electronic component, a first electronic component, and a second electronic component, to be mounted thereon. When a dimension of the first electronic component in a length direction is designated as L1, a dimension of the first electronic component in a width direction is designated as W1, a dimension of the second electronic component in the length direction is designated as L2, and a dimension of the second electronic component in the width direction is designated as W2, a dimension of the electronic component in the width direction is any one of W1 and W2.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: July 2, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masahiro Wakashima, Yuta Saito, Kohei Shimada, Naobumi Ikegami
  • Publication number: 20180268999
    Abstract: A multilayer ceramic capacitor includes a laminate with a rectangular or substantially rectangular parallelepiped shape and including dielectric layers, first internal electrode layers, and second internal electrode layers that are laminated; a first external electrode connected with the first internal electrode layers; and a second external electrode connected with the second internal electrode layers. Each of the first internal electrode layers or the second internal electrode layers has a coverage in a central portion in a W direction that is lower than a coverage within about 30.000 ?m from an end portion in the W direction, and has a shifting amount in the W direction of about 0.000 ?m or more and about 10.000 ?m or less.
    Type: Application
    Filed: March 9, 2018
    Publication date: September 20, 2018
    Inventors: Kohei SHIMADA, Akio MASUNARI, Yuta SAITO, Shunsuke ABE, Tomoo YUGUCHI
  • Patent number: 10062509
    Abstract: A multilayer ceramic capacitor that includes a laminated body having a plurality of ceramic layers including crystal grains that have a perovskite structure, and a plurality of internal electrode layers; and external electrodes on first and second end surfaces of the laminated body and electrically connected to respective sets of the plurality of internal electrodes. In the ceramic layers, when the content of Ti is 100 parts by mol, the ceramic layers contain Ca at 0.10 to 15.00 parts by mol; Mg at 0.0010 to 0.0097 parts by mol; R at 0.50 to 4.00 parts by mol; M at 0.10 to 2.00 parts by mol; and Si at 0.50 to 2.00 parts by mol, and core parts of the crystal grains contain Ca.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 28, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kohei Shimada
  • Patent number: 10060852
    Abstract: A multilayer ceramic capacitor includes a laminated body including laminated ceramic layers, and first and second internal electrodes extending along interfaces between the ceramic layers. External electrodes are located on outer surfaces of the laminated body. Phosphor is disposed on portions of outer surfaces of the laminated body containing no external electrodes.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: August 28, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kohei Shimada
  • Patent number: 10037851
    Abstract: A multilayer ceramic capacitor includes a laminated body including an inner layer portion including ceramic dielectric layers and internal electrodes, and outer layer portions including ceramic dielectric layers. External electrodes connected to the internal electrodes are provided on both ends of the laminated body. The main constituent of the inner layer portion is a perovskite-type compound represented by ABO3. The outer layer portions include first outer layers and second outer layers respectively containing oxides that differ from each other in main constituents, and boundary reaction layers are provided between the first outer layers and the second outer layers. First ceramic dielectric layers outside the boundary reaction layers differ in color from second ceramic dielectric layers inside the boundary reaction layers.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: July 31, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroyuki Wada, Kohei Shimada, Kenji Takagi, Tomomi Koga, Tomotaka Hirata, Hitoshi Nishimura, Hiroki Awata, Sui Uno
  • Patent number: 10026552
    Abstract: A multilayer ceramic capacitor that includes a laminated body having a plurality of ceramic layers including crystal grains that have a perovskite structure, and a plurality of internal electrode layers; and external electrodes on first and second end surfaces of the laminated body and electrically connected to respective sets of the plurality of internal electrodes. In the ceramic layers, when the content of Ti is 100 parts by mol, the ceramic layers contain Ca at 0.10 to 15.00 parts by mol; Mg at 0.0010 to 0.0097 parts by mol; R at 0.50 to 4.00 parts by mol; M at 0.10 to 2.00 parts by mol; and Si at 0.50 to 2.00 parts by mol, and core parts of the crystal grains contain Ca.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: July 17, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kohei Shimada
  • Patent number: 10014114
    Abstract: A mounting substrate on which at least any one of three kinds of electronic components including a first electronic component, a second electronic component, and a third electronic component are able to be mounted includes a pair of first edge portions and a pair of second edge portions. When a dimension of the first electronic component in its length direction is designated as L1, a dimension of the first electronic component in its width direction is designated as W1, a dimension of the second electronic component in its length direction is designated as L2, and a dimension of the second electronic component in its width direction is designated as W2, a dimension of the third electronic component in its width direction is any one of W1 and W2, and a dimension of the third electronic component in its length direction is L2 when the dimension of the third electronic component in its width direction is W1, and is L1 when the dimension of the third electronic component in its width direction is W2.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: July 3, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiro Wakashima, Yuta Saito, Kohei Shimada, Naobumi Ikegami
  • Publication number: 20180042122
    Abstract: An electronic component is able to be mounted on a mounting substrate on which a first electronic component and a second electronic component are able to be mounted. When dimensions of the first electronic component and the second electronic component in a width direction is designated as W1 and W2, respectively, and dimensions of the first electronic component and the second electronic component in a length direction are designated as L1 and L2, respectively, dimensions of the electronic component in the width direction and the length direction are any one of combinations of W1 and L2, and of W2 and L1. The electronic component includes a third laminate including a pair of third principal surfaces, a pair of third side surfaces, and a pair of third end surfaces, and a pair of third external electrodes. Each of the pair of third external electrodes includes a fired layer, and a resin layer provided on an external surface of the fired layer.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 8, 2018
    Inventors: Masahiro WAKASHIMA, Yuta SAITO, Kohei SHIMADA, Naobumi IKEGAMI
  • Publication number: 20180040426
    Abstract: An electronic component is able to be mounted on a mounting substrate including a pair of first edge portions that faces each other, and a pair of second edge portions that is perpendicular or substantially perpendicular to the pair of first edge portions and faces each other. The mounting substrate has a structure that allows at least any one of the electronic component, a first electronic component, and a second electronic component, to be mounted thereon. When a dimension of the first electronic component in a length direction is designated as L1, a dimension of the first electronic component in a width direction is designated as W1, a dimension of the second electronic component in the length direction is designated as L2, and a dimension of the second electronic component in the width direction is designated as W2, a dimension of the electronic component in the width direction is any one of W1 and W2.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 8, 2018
    Inventors: Masahiro WAKASHIMA, Yuta SAITO, Kohei SHIMADA, Naobumi IKEGAMI
  • Publication number: 20180040428
    Abstract: A mounting substrate on which at least any one of three kinds of electronic components including a first electronic component, a second electronic component, and a third electronic component are able to be mounted includes a pair of first edge portions and a pair of second edge portions. When a dimension of the first electronic component in its length direction is designated as L1, a dimension of the first electronic component in its width direction is designated as W1, a dimension of the second electronic component in its length direction is designated as L2, and a dimension of the second electronic component in its width direction is designated as W2, a dimension of the third electronic component in its width direction is any one of W1 and W2, and a dimension of the third electronic component in its length direction is L2 when the dimension of the third electronic component in its width direction is W1, and is L1 when the dimension of the third electronic component in its width direction is W2.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 8, 2018
    Inventors: Masahiro WAKASHIMA, Yuta SAITO, Kohei SHIMADA, Naobumi IKEGAMI
  • Publication number: 20170178808
    Abstract: A perovskite ceramic composition that contains Sn, Ba, and Ti, and where the Sn content is within a range of about 0.001 parts by mol?Sn?about 0.999 parts by mole with respect to 100 parts by mole of the Ti. The perovskite ceramic composition can be used in a composition that further includes a rare earth element R, Mn, and Si, and optionally Mg, where proportions of the R, the Mn, the Si, and the optional Mg, satisfy R: 0<R?about 10 parts by mole, Mn: 0<Mn?about 5 parts by mole, Si: 0<Si?about 5 parts by mole Mg: 0<Mg?about 5 parts by mole with respect to 100 parts by mole of Ti.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 22, 2017
    Inventors: KOHEI SHIMADA, Katsuya Ishida
  • Publication number: 20170178812
    Abstract: A multilayer ceramic capacitor that includes a laminated body having a plurality of ceramic layers including crystal grains that have a perovskite structure, and a plurality of internal electrode layers; and external electrodes on first and second end surfaces of the laminated body and electrically connected to respective sets of the plurality of internal electrodes. In the ceramic layers, when the content of Ti is 100 parts by mol, the ceramic layers contain Ca at 0.10 to 15.00 parts by mol; Mg at 0.0010 to 0.0097 parts by mol; R at 0.50 to 4.00 parts by mol; M at 0.10 to 2.00 parts by mol; and Si at 0.50 to 2.00 parts by mol, and core parts of the crystal grains contain Ca.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 22, 2017
    Inventor: KOHEI SHIMADA
  • Publication number: 20170133156
    Abstract: A multilayer ceramic capacitor includes a laminated body including an inner layer portion including ceramic dielectric layers and internal electrodes, and outer layer portions including ceramic dielectric layers. External electrodes connected to the internal electrodes are provided on both ends of the laminated body. The main constituent of the inner layer portion is a perovskite-type compound represented by ABO3. The outer layer portions include first outer layers and second outer layers respectively containing oxides that differ from each other in main constituents, and boundary reaction layers are provided between the first outer layers and the second outer layers. First ceramic dielectric layers outside the boundary reaction layers differ in color from second ceramic dielectric layers inside the boundary reaction layers.
    Type: Application
    Filed: January 20, 2017
    Publication date: May 11, 2017
    Inventors: Hiroyuki WADA, Kohei SHIMADA, Kenji TAKAGI, Tomomi KOGA, Tomotaka HIRATA, Hitoshi NISHIMURA, Hiroki AWATA, Sui UNO