Abstract: A battery management system includes: a battery module accommodation section; a charging and discharging control section; and a shipping target selection section. The battery module accommodation section is configured to separately accommodate a plurality of battery modules in blocks. The blocks each includes a predetermined number of the battery modules. The predetermined number is greater than or equal to 2. The charging and discharging control section is configured to charge and discharge the battery modules in units of the blocks. The battery modules are accommodated in the battery module accommodation section. The shipping target selection section is configured to select, in units of the blocks, the battery modules serving as shipping targets from the battery modules accommodated in the battery module accommodation section.

Abstract: A higher usage fee is set for external supply power as predetermined contract power increases. A battery management system includes: a contract power information acquisition section configured to acquire contract power information indicating the contract power; a power-in-use estimation section configured to estimate power in use in the storage plant in a target time zone in future; a discharge plan creation section configured to create a discharge plan in which discharge power from the battery is supplied as power to be used in the storage plant when the power in use in the target time zone exceeds the contract power; and a discharging control section configured to discharge the battery on the basis of the discharge plan. The power in use in the target time zone is estimated by the power-in-use estimation section.

Abstract: A signal processing device includes an excessive input estimating unit that estimates excessive input of a target signal, a controller that calculates frequency characteristics which will lessen the excessive input of the target signal from the excessive input information estimated by the excessive input estimating unit, and a frequency characteristic modification unit that modifies the frequency characteristics of the target signal in accordance with the frequency characteristics the controller calculates.

Abstract: A signal processing device includes an excessive input estimating unit 102 that estimates excessive input of a target signal, a controller 105 that calculates frequency characteristics which will lessen the excessive input of the target signal from the excessive input information estimated by the excessive input estimating unit 102, and a frequency characteristic modification unit 103 that modifies the frequency characteristics of the target signal in accordance with the frequency characteristics the controller 105 calculates.

Abstract: A signal processing circuit has two types of filters: an IIR filter 11 and an FIR filter 12 having an equivalent transfer function at all times. In an adjustment mode in which the signal processing circuit is adjusted to have an arbitrary transfer function, the signal processing circuit makes a configuration setting to use the IIR filter 11. When completing the adjustment or in a signal processing mode, the signal processing circuit makes a configuration setting change to switch to the FIR filter 12 having the equivalent transfer function.

Abstract: A signal receiving apparatus 2 has a memory circuit 22, writing of data contained in a digital input signal transmitted from a signal transmitting apparatus 1 is performed using a clock signal separated and created by a PLL circuit 21 from the digital input signal received, and reading is performed using a reference clock signal with quartz accuracy from a reference clock generating circuit 24. To reproduce the digital input signal by correcting the shift between the clock signal and the reference clock signal, the signal receiving apparatus detects the shift between the two clock signals. When the signal receiving apparatus 2 side lags behind the signal transmitting apparatus 1, the data contained in the digital input signal undergoes thinning out, and when it leads, a signal generated from previous and subsequent digital input signal is interpolated.

Abstract: A band-splitting time compensation signal processing device 2 includes a band-splitting circuit 211 for extracting, after extracting a signal of a high-frequency band component or low-frequency band component from an input signal, a signal of the low-frequency band component or high-frequency band component by subtracting the signal of the high-frequency band component or low-frequency band component from the input signal; a delay circuit 212 for delaying, for adjusting arrival time, at least one of the high-frequency band component and low-frequency band component output from the band-splitting circuit 211; and a mixing circuit 213 for combining the high-frequency band component or low-frequency band component output from the delay circuit 212 with the low-frequency band component or high-frequency band component output from the band-splitting circuit 211.

Abstract: A complementary pulse width modulation circuit is composed of a signal generating circuit 10 for generating first and second pulse width modulation signals (PWM#1 and PWM#2) that are complementary to each other from an input signal (IN) in response to a sampling synchronous signal (Sample) generated in synchronization with a clock (CLK); and a signal output circuit 20 for combining a positive signal and a negative signal of the first pulse width modulation signal (PWM#1) generated by the signal generating circuit, and for combining the first pulse width modulation signal (PWM#1) combined with the second pulse width modulation signal (PWM#2), followed by outputting.

Abstract: A complementary pulse width modulation circuit is composed of a signal generating circuit 10 for generating first and second pulse width modulation signals (PWM#1 and PWM#2) that are complementary to each other from an input signal (IN) in response to a sampling synchronous signal (Sample) generated in synchronization with a clock (CLK); and a signal output circuit 20 for combining a positive signal and a negative signal of the first pulse width modulation signal (PWM#1) generated by the signal generating circuit, and for combining the first pulse width modulation signal (PWM#1) combined with the second pulse width modulation signal (PWM#2), followed by outputting.

Abstract: A signal transmission device includes a transmitting circuit 11 and a receiving circuit 12 provided with shunt regulator power supplies 110 and 120 for causing fixed currents to flow thereinto respectively, and a signal transmission path 13 connecting between the transmitting circuit 11 and the receiving circuit 12 and having a function of preventing an alternating current component, in which a ground GNDA of the transmitting circuit 11 and a ground GNDB of the receiving circuit 12 are disposed independently of each other, and are connected to a ground GNDC of the shunt regulator power supplies 110 and 120 at a single point.

Abstract: A signal transmission device 10 is constructed in such a way that transmitting equipment 11 and receiving equipment 12 are connected to each other via a transmission path which consists of at least hot and cold signal lines, and a signal output stage of the transmitting equipment 11 is comprised of a current output circuit 112 and a load impedance Z (113) for converting a current I0 created by the current output circuit 112 into a voltage, the load impedance Z (113) has an end connected to the hot signal line (H) of the transmission path 13 and another end connected to the cold signal line (C) of the transmission path, and the cold signal line (C) of the transmission path is connected to a ground terminal (GNDB) of the receiving equipment 12.

Abstract: A signal processing circuit has two types of filters: an IIR filter 11 and an FIR filter 12 having an equivalent transfer function at all times. In an adjustment mode in which the signal processing circuit is adjusted to have an arbitrary transfer function, the signal processing circuit makes a configuration setting to use the IIR filter 11. When completing the adjustment or in a signal processing mode, the signal processing circuit makes a configuration setting change to switch to the FIR filter 12 having the equivalent transfer function.

Abstract: A signal receiving apparatus 2 has a memory circuit 22, writing of data contained in a digital input signal transmitted from a signal transmitting apparatus 1 is performed using a clock signal separated and created by a PLL circuit 21 from the digital input signal received, and reading is performed using a reference clock signal with quartz accuracy from a reference clock generating circuit 24. To reproduce the digital input signal by correcting the shift between the clock signal and the reference clock signal, the signal receiving apparatus detects the shift between the two clock signals. When the signal receiving apparatus 2 side lags behind the signal transmitting apparatus 1, the data contained in the digital input signal undergoes thinning out, and when it leads, a signal generated from previous and subsequent digital input signal is interpolated.

Abstract: A band-splitting time compensation signal processing device 2 includes a band-splitting circuit 211 for extracting, after extracting a signal of a high-frequency band component or low-frequency band component from an input signal, a signal of the low-frequency band component or high-frequency band component by subtracting the signal of the high-frequency band component or low-frequency band component from the input signal; a delay circuit 212 for delaying, for adjusting arrival time, at least one of the high-frequency band component and low-frequency band component output from the band-splitting circuit 211; and a mixing circuit 213 for combining the high-frequency band component or low-frequency band component output from the delay circuit 212 with the low-frequency band component or high-frequency band component output from the band-splitting circuit 211.

Abstract: Each of a plurality of Fresnel prisms 12 is formed so that a refractive surface 12 thereof includes a non-light incidence surface 12c upon which any light ray emitted from a projector 1 is not directly incident because it is intercepted by another Fresnel prism 12, the non-light incidence surface having an angle ?? with a reflective surface 12b which is different from the prism apex angle ? of each of the plurality of Fresnel prisms. As a result, a light ray reflected by the refractive surface 12a of each of the plurality of Fresnel prisms without passing through the refractive surface can be preventing from emerging, as unnecessary light, toward the viewer's line of sight.

Abstract: An image display device comprises an optical imaging arrangement for providing image information to illumination light and for transmitting the light as an optical image signal; a display for receiving the optical image signal and for displaying an image based on the image information; and a projecting optical arrangement including a reflecting part having a reflecting surface for reflecting the optical image signal, and a refracting optical part having a refracting surface for projecting the optical image signal onto the reflecting part. At least one of the reflecting surface and the refracting surface is aspherical.

Abstract: Each of a plurality of Fresnel prisms 12 is formed so that a refractive surface 12 thereof includes a non-light incidence surface 12c upon which any light ray emitted from a projector 1 is not directly incident because it is intercepted by another Fresnel prism 12, the non-light incidence surface having an angle ?? with a reflective surface 12b which is different from the prism apex angle ? of each of the plurality of Fresnel prisms. As a result, a light ray reflected by the refractive surface 12a of each of the plurality of Fresnel prisms without passing through the refractive surface can be preventing from emerging, as unnecessary light, toward the viewer's line of sight.

Abstract: An image display device comprises an optical imaging arrangement for providing image information to illumination light and for transmitting the light as an optical image signal; a display for receiving the optical image signal and for displaying an image based on the image information; and a projecting optical arrangement including a reflecting part having a reflecting surface for reflecting the optical image signal, and a refracting optical part having a refracting surface for projecting the optical image signal onto the reflecting part. At least one of the reflecting surface and the refracting surface is aspherical.

Abstract: Each of a plurality of Fresnel prisms 12 is formed so that a refracting surface 12 thereof includes a non-light incidence surface 12c upon which any ray of light emitted from a projector 1 is not directly incident because it is intercepted by another Fresnel prism 12, the non-light incidence surface having an angle ?? with a reflecting surface 12b which is different from the prism apex angle ? of each of the plurality of Fresnel prisms. As a result, a ray of light reflected by the refracting surface 12a of each of the plurality of Fresnel prisms without passing through the refracting surface can be preventing from emerging, as unnecessary light, toward the viewer's line of sight.