Patents by Inventor Kohichi Tanda

Kohichi Tanda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10069339
    Abstract: A wireless power feeding method includes causing each of a plurality of power transmitters to acquire power amounts for power received by one or more of a power receptors which are targets for power transmission, determining a first power amount which is the smallest out of acquired power amounts, and adjusting a power transmission direction to be a direction in which the power received by the power receptor which has received the first power amount is maximum. Each of the plurality of power transmitters are caused to transmit power in the adjusted power transmission direction and leaked power amounts for leaked power, which is received by the power receptors that are the targets for power transmission of other power transmitters, are acquired as leaked power amounts to the power transmitters for which the targets for power transmission are the power receptors which receive the leaked power.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: September 4, 2018
    Assignee: Panasonic Corporation
    Inventors: Hiroyuki Tani, Kohichi Tanda
  • Publication number: 20170353052
    Abstract: A wireless power feeding method includes causing each of a plurality of power transmitters to acquire power amounts for power received by one or more of a power receptors which are targets for power transmission, determining a first power amount which is the smallest out of acquired power amounts, and adjusting a power transmission direction to be a direction in which the power received by the power receptor which has received the first power amount is maximum. Each of the plurality of power transmitters are caused to transmit power in the adjusted power transmission direction and leaked power amounts for leaked power, which is received by the power receptors that are the targets for power transmission of other power transmitters, are acquired as leaked power amounts to the power transmitters for which the targets for power transmission are the power receptors which receive the leaked power.
    Type: Application
    Filed: May 11, 2017
    Publication date: December 7, 2017
    Inventors: HIROYUKI TANI, KOHICHI TANDA
  • Patent number: 9018035
    Abstract: A pressed-contact type semiconductor device includes a power semiconductor element, on an upper surface of which at least a first electrode is formed and on a lower surface of which at least a second electrode is formed, lead frames which face the first electrode and the second electrode of the power semiconductor element respectively, and a clip which applies a pressure to the lead frames while the power semiconductor element is sandwiched by the lead frames, wherein a metallic porous plating part is formed on a surface which faces the first electrode or the second electrode, the surface being a surface of at least one of the lead frames.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: April 28, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Norihito Tsukahara, Toshiyuki Kojima, Takayuki Hirose, Keiko Ikuta, Kohichi Tanda
  • Patent number: 8816481
    Abstract: A semiconductor device which can reduce a heat stress to a solder layer while suppressing an increase of thermal resistance is provided. A semiconductor device includes a semiconductor element, a solder layer which is arranged on at least one surface of the semiconductor element and a lead frame which is arranged on the solder layer so that a porous nickel plating part is sandwiched between the lead frame and the solder layer. Compared with a case that the semiconductor element and the lead frame are jointed by a solder directly, an increased part of a thermal resistance of the solder junction is held down only to a part of the porous nickel plating part and a thermal resistance applied to the solder layer can be reduced.
    Type: Grant
    Filed: October 1, 2012
    Date of Patent: August 26, 2014
    Assignee: Panasonic Corporation
    Inventors: Keiko Ikuta, Lianji Jin, Takayuki Hirose, Toshiyuki Kojima, Norihito Tsukahara, Kohichi Tanda
  • Publication number: 20140110827
    Abstract: A pressed-contact type semiconductor device includes a power semiconductor element, on an upper surface of which at least a first electrode is formed and on a lower surface of which at least a second electrode is formed, lead frames which face the first electrode and the second electrode of the power semiconductor element respectively, and a clip which applies a pressure to the lead frames while the power semiconductor element is sandwiched by the lead frames, wherein a metallic porous plating part is formed on a surface which faces the first electrode or the second electrode, the surface being a surface of at least one of the lead frames.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: Panasonic Corporation
    Inventors: Norihito Tsukahara, Toshiyuki Kojima, Takayuki Hirose, Keiko Ikuta, Kohichi Tanda
  • Publication number: 20140054757
    Abstract: A semiconductor device which can reduce a heat stress to a solder layer while suppressing an increase of thermal resistance is provided. A semiconductor device includes a semiconductor element, a solder layer which is arranged on at least one surface of the semiconductor element and a lead frame which is arranged on the solder layer so that a porous nickel plating part is sandwiched between the lead frame and the solder layer. Compared with a case that the semiconductor element and the lead frame are jointed by a solder directly, an increased part of a thermal resistance of the solder junction is held down only to a part of the porous nickel plating part and a thermal resistance applied to the solder layer can be reduced.
    Type: Application
    Filed: October 1, 2012
    Publication date: February 27, 2014
    Applicant: Panasonic Corporation
    Inventors: Keiko Ikuta, Lianji Jin, Takayuki Hirose, Toshiyuki Kojima, Norihito Tsukahara, Kohichi Tanda
  • Patent number: 8093505
    Abstract: Provided is a layered electronic circuit device capable of realizing high-density/high-function mounting, easily inspecting and repairing the respective constituent elements, and improving the electronic connection characteristic. The layered electronic circuit device includes a first circuit substrate (101) and a second circuit substrate (102) which are arranged in parallel such that their substrate surfaces are opposed to each other. The peripheral portion of the first circuit substrate (101) and the peripheral portion of the second circuit substrate (102) are connected to each other by connection members (10a to 10d) having a wiring member (103) and a thermal hardening anisotropic conductive sheet (107), thereby performing electric connection.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: January 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Manabu Gokan, Akihisa Nakahashi, Takayuki Hirose, Yoko Kasai, Kohichi Tanda
  • Publication number: 20100230147
    Abstract: Provided is a layered electronic circuit device capable of realizing high-density/high-function mounting, easily inspecting and repairing the respective constituent elements, and improving the electronic connection characteristic. The layered electronic circuit device includes a first circuit substrate (101) and a second circuit substrate (102) which are arranged in parallel such that their substrate surfaces are opposed to each other. The peripheral portion of the first circuit substrate (101) and the peripheral portion of the second circuit substrate (102) are connected to each other by connection members (10a to 10d) having a wiring member (103) and a thermal hardening anisotropic conductive sheet (107), thereby performing electric connection.
    Type: Application
    Filed: August 10, 2007
    Publication date: September 16, 2010
    Applicant: Panasonic Corporation
    Inventors: Manabu Gokan, Akihisa Nakahashi, Takayuki Hirose, Yoko Kasai, Kohichi Tanda