Patents by Inventor Kohji Saitoh
Kohji Saitoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967294Abstract: A common electrode driver includes an inverting amplifier including a first resistor, a second resistor, and an operational amplifier, and a resistance ratio adjustment circuit that adjusts, in accordance with a length of one horizontal scan period, a resistance ratio being a ratio of a resistance value of the second resistor to a resistance value of the first resistor. A feedback voltage is provided to one end of the first resistor. The resistance ratio adjustment circuit sets the resistance ratio when second driving is performed, in which a length of one horizontal scan period is a second time longer than a first time, to be smaller than the resistance ratio when first driving is performed, in which a length of one horizontal scan period is the first time.Type: GrantFiled: May 1, 2023Date of Patent: April 23, 2024Assignee: Sharp Display Technology CorporationInventors: Masaki Uehata, Yasuki Mori, Kohji Saitoh, Takayuki Mizunaga, Kazuya Kondoh, Takashi Nojima, Kazuhisa Yoshimoto, Kosuke Kawamoto, Hiroyuki Kito, Kazuki Nakamichi
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Publication number: 20240005885Abstract: A common electrode driver includes an inverting amplifier including a first resistor, a second resistor, and an operational amplifier, and a resistance ratio adjustment circuit that adjusts, in accordance with a length of one horizontal scan period, a resistance ratio being a ratio of a resistance value of the second resistor to a resistance value of the first resistor. A feedback voltage is provided to one end of the first resistor. The resistance ratio adjustment circuit sets the resistance ratio when second driving is performed, in which a length of one horizontal scan period is a second time longer than a first time, to be smaller than the resistance ratio when first driving is performed, in which a length of one horizontal scan period is the first time.Type: ApplicationFiled: May 1, 2023Publication date: January 4, 2024Applicant: Sharp Display Technology CorporationInventors: Masaki UEHATA, Yasuki MORI, Kohji SAITOH, Takayuki MIZUNAGA, Kazuya KONDOH, Takashi NOJIMA, Kazuhisa YOSHIMOTO, Kosuke KAWAMOTO, Hiroyuki KITO, Kazuki NAKAMICHI
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Patent number: 10896650Abstract: A short-circuiting circuit short-circuits source bus lines such that a sum of numbers assigned to two source bus lines forming each set in each group is equal for all sets when it is assumed that K consecutive source bus lines (K is an even number greater than or equal to 4) form one group and numbers from 1 to K are assigned to the K source bus lines. For example, with four consecutive source bus lines forming one group, in each group, the short-circuiting circuit short-circuits the first and fourth source bus lines and short-circuits the second and third source bus lines.Type: GrantFiled: May 25, 2017Date of Patent: January 19, 2021Assignee: SHARP KABUSHIKI KAISHAInventors: Kohji Saitoh, Kosuke Kawamoto, Kazuhisa Yoshimoto, Kazuya Kondoh, Masaki Uehata, Yasuki Mori
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Patent number: 10810959Abstract: A display device includes a display panel having a display surface, display drivers arranged on and along a peripheral portion of the display panel, a wiring substrate located on a side of the display panel opposite from the display surface and having a long shape extending in an arrangement direction of the display drivers, first flexible wiring substrates electrically connecting the display drivers to the wiring substrate, a second flexible wiring substrate extending from the wiring substrate toward an outer periphery of the display panel, and a control board connected to an extended end portion of the second flexible wiring substrate and configured to control the display drivers and disposed not to overlap the display panel in a thickness direction of the display panel and having a dimension in the thickness direction of the display panel larger than that of the wiring substrate.Type: GrantFiled: June 28, 2018Date of Patent: October 20, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Kazuhisa Yoshimoto, Kohji Saitoh, Yasuki Mori, Masaki Uehata, Kazuya Kondoh, Kosuke Kawamoto
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Publication number: 20200286437Abstract: A display device includes a display panel having a display surface display rivers arranged on and along a peripheral portion of the display panel, a wiring substrate located on a side of the display panel opposite from the display surface and having a long shape extending in an arrangement direction of the display drivers first flexible wiring substrates electrically connection the display drivers to the wiring substrate, a second flexible wiring substrate extending from the wiring substrate toward an outer periphery of the display panel and a control board connected to an extended end portion of the second flexible wiring substrate and configured to control the display drivers and disposed not to overlap the display panel in a thickness direction of the display panel and having a dimension in the thickness direction of the display panel larger than that of the wiring substrate.Type: ApplicationFiled: June 28, 2018Publication date: September 10, 2020Applicant: Sharp Kabushiki KaishaInventors: Kazuhisa YOSHIMOTO, Kohji SAITOH, Yasuki MORI, Masaki UEHATA, Kazuya KONDOH, Kosuke KAWAMOTO
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Patent number: 10564916Abstract: A liquid crystal display device includes a liquid crystal panel and a control unit. The control unit stores a plurality of setting values of a voltage applied to a counter electrode. The setting value is a value of the applied voltage at which variation in luminance appears at a portion located apart from a reference portion that is a region in the liquid crystal panel.Type: GrantFiled: October 10, 2018Date of Patent: February 18, 2020Assignee: SHARP KABUSHIKI KAISHAInventors: Kazuya Kondoh, Yasuki Mori, Masaki Uehata, Kohji Saitoh, Kazuhisa Yoshimoto, Kosuke Kawamoto
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Publication number: 20190235336Abstract: [Problem] An object is to reduce crosstalk.Type: ApplicationFiled: January 30, 2019Publication date: August 1, 2019Inventors: MASAKI UEHATA, KOHJI SAITOH, YASUKI MORI, KAZUYA KONDOH, KAZUHISA YOSHIMOTO, KOSUKE KAWAMOTO
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Publication number: 20190164512Abstract: There is provided a source driver (video signal line drive circuit) using a charge sharing system that achieves lower power consumption than a conventional case. A short-circuiting circuit short-circuits source bus lines such that a sum of numbers assigned to two source bus lines forming each set in each group is equal for all sets when it is assumed that K consecutive source bus lines (K is an even number greater than or equal to 4) form one group and numbers from 1 to K are assigned to the K source bus lines. For example, with four consecutive source bus lines forming one group, in each group, the short-circuiting circuit short-circuits the first and fourth source bus lines and short-circuits the second and third source bus lines.Type: ApplicationFiled: May 25, 2017Publication date: May 30, 2019Inventors: KOHJI SAITOH, KOSUKE KAWAMOTO, KAZUHISA YOSHIMOTO, KAZUYA KONDOH, MASAKI UEHATA, YASUKI MORI
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Publication number: 20190108805Abstract: A liquid crystal display device includes a liquid crystal panel and a control unit. The control unit stores a plurality of setting values of a voltage applied to a counter electrode. The setting value is a value of the applied voltage at which variation in luminance appears at a portion located apart from a reference portion that is a region in the liquid crystal panel.Type: ApplicationFiled: October 10, 2018Publication date: April 11, 2019Inventors: KAZUYA KONDOH, YASUKI MORI, MASAKI UEHATA, KOHJI SAITOH, KAZUHISA YOSHIMOTO, KOSUKE KAWAMOTO
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Patent number: 9666140Abstract: The invention provides a gate-in-panel display device capable of preventing deterioration of thin-film transistors during pause drive, as well as a method for driving the same. At the end of a drive period, an active clear signal is provided to thin-film transistors in unit circuits, each thin-film transistor being connected to either a first or second node at a gate terminal, thereby bringing the thin-film transistors into ON state. As a result, the voltages of the first and second nodes are set to a reference voltage. Thus, even if a pause period lasts for a long period of time, the gate terminals of the thin-film transistors are not subjected to sustained voltage application, leading to no threshold voltage shifts.Type: GrantFiled: December 6, 2013Date of Patent: May 30, 2017Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Masami Ozaki, Akihisa Iwamoto, Tomohiko Nishimura, Kohji Saitoh, Masaki Uehata
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Patent number: 9570030Abstract: A gate driver (24) which is provided by an IGZO-GDM and a level shifter circuit (13) are connected to each other via a first through a fifth wires (OL1 through OL5). Each wire (OL) is connected to a discharge unit (190). If an electric power supply to a first through a fifth output circuits (OC1 through OC5) in the level shifter circuit (13) becomes lower than a lower operation limit value during a power-off sequence which is supposed to remove a residual charge from inside a panel, outputs from the first through the fifth output circuits (OC1 through OC5) assume a high-impedance state, whereupon a potential on each wire (OL) is drawn by a discharge unit (190) into a ground potential. Therefore, residual charge inside the panel is removed quickly and stably when power supply is shut off.Type: GrantFiled: October 11, 2013Date of Patent: February 14, 2017Assignee: Sharp Kabushiki KaishaInventors: Akihisa Iwamoto, Masami Ozaki, Tomohiko Nishimura, Kohji Saitoh, Masaki Uehata, Jun Nakata
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Publication number: 20170011695Abstract: A display device performs display with a dot inversion driving method wherein, during a prescribed period of time between one driving period in which all of the scanning signal lines are scanned and a next driving period, an idle period that is longer in duration than each driving period is provided during which potentials of the plurality of data signal lines are kept constant, and during the idle period, the driving power control unit lowers a driving power of the signal line driver circuit, and wherein the signal line driver circuit outputs the data signals to the respective data signal lines during the driving period, and during the idle period, the signal line driver circuit sets an output thereof to the respective data signal lines to one of a high impedance state and a ground potential, such that the plurality of data signal lines have a constant potential.Type: ApplicationFiled: September 26, 2016Publication date: January 12, 2017Applicant: Sharp Kabushiki KaishaInventors: Jun NAKATA, Kohji SAITOH
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Patent number: 9530384Abstract: In a display device that can use a low frequency drive method, in the case of low frequency drive, in a data correction unit (23) of a display control circuit (200), a pixel grayscale value is set such that the differential value between the potential difference between the pixel electrode and the common electrode when a voltage of positive polarity is applied and the potential difference between the pixel electrode and the common electrode when a voltage of negative polarity is applied becomes larger than during normal drive. With this, a correction amount (shift amount) is made larger during low frequency drive than during normal drive, whereby flickers and ghosting during low frequency drive are prevented.Type: GrantFiled: November 8, 2013Date of Patent: December 27, 2016Assignee: Sharp Kabushiki KaishaInventors: Kohji Saitoh, Akihisa Iwamoto, Tomohiko Nishimura, Masaki Uehata, Jun Nakata, Masami Ozaki
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Patent number: 9478186Abstract: When an idle period is started, a voltage of the control signal is changed from a value H to a value L. As a result, the analog amplifiers provided in the signal line driver circuit are switched from the normal state to the low-driving power state. At this time, the data signal lines are set to have a constant potential. A gate voltage is changed from Vgh to Vgl at the same time as when the control signal was changed from the value H to the value L. As a result, the gate of each TFT returns to the OFF state from the ON state. The control signal remains at the value L until the idle period is over. In other words, when the next driving period is started, the voltage of the control signal is changed from the value L to the value H. As a result, the analog amplifiers in the signal line driver circuit are switched back to the normal state from the low-driving power state.Type: GrantFiled: October 21, 2011Date of Patent: October 25, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Jun Nakata, Kohji Saitoh
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Patent number: 9437154Abstract: Provided for each data signal line drive circuit (6a, 6b, 6c) are: a voltage generation circuit (61a, 61b, 61c) that generates a drive voltage in accordance with an external voltage; and a voltage determination circuit (63a, 63b, 63c) which determines whether or not a voltage level of at least either the external voltage or the drive voltage falls within a range of allowable voltages, in a case where the voltage level does not fall within the range of allowable voltages, operation of the voltage generation circuits (61a, 61b, 61c) being stopped.Type: GrantFiled: April 5, 2012Date of Patent: September 6, 2016Assignee: Sharp Kabushiki KaishaInventors: Jun Nakata, Masaki Uehata, Kohji Saitoh, Masami Ozaki, Toshihiro Yanagi
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Patent number: 9423637Abstract: A source AMP output circuit (10) is provided with a switching circuit (17) for carrying out the following operation. That is, in a case where a polarity is reversed, the switching circuit (17) disconnects a data signal line (S(M)) from output terminals of a positive amplifier circuit (15) and a negative polarity amplifier circuit (16) each included in the source AMP output circuit (10), and then connects the data signal line S(M) to a power supply which is in a power supply voltage range (Vdd1 to Vdd3) of the positive polarity amplifier circuit (15) or to a power supply which is in a power supply voltage range (Vdd2 to Vdd4) of the negative polarity amplifier circuit (16).Type: GrantFiled: April 23, 2012Date of Patent: August 23, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Kohji Saitoh, Masaki Uehata, Masami Ozaki, Toshihiro Yanagi
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Patent number: 9424795Abstract: A display device (1) includes: a scan line drive circuit (4) which line-sequentially selects from among a plurality of scan signal lines; at least one signal line drive circuit (3) which has a receiving circuit that receives a data signal, and which sequentially supplies the data signal to pixels linked to a scan signal line (6) selected by the scan line drive circuit (4); a timing controller (10) which defines, in accordance with sync signals received from an outside source, a non-scan period during which none of the scan signal lines is selected, and which transmits, to the at least one signal line drive circuit (3), an operation discriminant signal that causes the receiving circuit to be underrun during at least part of the non-scan period thus defined. The at least one signal line drive circuit (3) and the timing controller (10) are provided as separate entities.Type: GrantFiled: April 3, 2012Date of Patent: August 23, 2016Assignee: Sharp Kabushiki KaishaInventors: Kohji Saitoh, Masaki Uehata, Asahi Yamato, Masami Ozaki, Toshihiro Yanagi
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Patent number: 9355606Abstract: A liquid crystal display device includes: a data signal line; a scan signal line; a pixel electrode; a transistor connected to (i) the data signal line, (ii) the scan signal line, and (iii) the pixel electrode; and a common electrode, the liquid crystal display device being configured to turn on the transistor during a power-off sequence by causing a change in an electric potential of the scan signal line, the electric potential of the scan signal line reaching a first electric potential at a first timing after the change is initiated, and the common electrode being in an electrically floating state at a second timing which comes after the first timing.Type: GrantFiled: January 25, 2013Date of Patent: May 31, 2016Assignee: Sharp Kabushiki KaishaInventors: Kohji Saitoh, Akihisa Iwamoto, Masami Ozaki, Masaki Uehata, Jun Nakata, Tomohiko Nishimura
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Patent number: 9311872Abstract: A display device (1) includes (i) refresh rate changing means (15) for changing a refresh rate of a display panel (2) and (ii) a polarity reversal controlling section (20) for changing, in accordance with a change in the refresh rate, at least one of a temporal cycle and a spatial cycle of a polarity reversal of a source signal.Type: GrantFiled: August 7, 2012Date of Patent: April 12, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Kohzoh Takahashi, Kohji Saitoh, Akizumi Fujioka, Jun Nakata, Toshihiro Yanagi
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Patent number: 9299316Abstract: The object of the present invention is to provide a display device and a driving method each of which is capable of displaying moving images without causing flicker and reducing power consumption. The display device (1) includes: a display panel (2) having a plurality of scanning signal lines (G) and a plurality of data signal lines (S); a scanning line drive circuit for scanning the plurality of scanning signal lines (G); and a signal line drive circuit (6) for supplying data signals, via the plurality of data signal lines, to pixels. In the display device 1, the plurality of scanning signal lines (G) includes a scanning signal line (Gb) for displaying a first certain color, scanning signal lines for displaying the other colors (Gr, Gg), among which the scanning signal line (Gb) is scanned least frequently than the scanning signal line (Gr) and the scanning signal line (Gg).Type: GrantFiled: February 3, 2012Date of Patent: March 29, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Kohji Saitoh, Masami Ozaki