Patents by Inventor Kohji URAMOTO

Kohji URAMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11244880
    Abstract: A semiconductor device may be provided with: a semiconductor chip; an encapsulant encapsulating the semiconductor chip therein; and a conductor member joined to the semiconductor chip via a solder layer within the encapsulant. The conductor member may comprise a joint surface in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface. The side surface may comprise an unroughened area and a roughened area that is greater in surface roughness than the unroughened area. The unroughened area may be located adjacent to the peripheral edge of the joint surface.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: February 8, 2022
    Assignee: DENSO CORPORATION
    Inventors: Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
  • Patent number: 11201099
    Abstract: A semiconductor device may include a substrate constituted of an insulator; a first conductor film provided on a part of the substrate; a semiconductor chip located on the first conductor film; and an external connection terminal joined to the substrate via a joining layer at a position separated from the first conductor film. The semiconductor chip may be a power semiconductor chip including a main electrode and a signal electrode. The main electrode may be electrically connected to the first conductor film and the signal electrode may be electrically connected to the external connection terminal.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: December 14, 2021
    Assignee: DENSO CORPORATION
    Inventors: Akinori Sakakibara, Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
  • Publication number: 20200365498
    Abstract: A semiconductor device may be provided with: a semiconductor chip; an encapsulant encapsulating the semiconductor chip therein; and a conductor member joined to the semiconductor chip via a solder layer within the encapsulant. The conductor member may comprise a joint surface in contact with the solder layer and a side surface extending from a peripheral edge of the joint surface. The side surface may comprise an unroughened area and a roughened area that is greater in surface roughness than the unroughened area. The unroughened area may be located adjacent to the peripheral edge of the joint surface.
    Type: Application
    Filed: April 3, 2020
    Publication date: November 19, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Takanori Kawashima, Takuya Kadoguchi, Kohji Uramoto, Yasuhiro Ogawa
  • Publication number: 20200203252
    Abstract: A semiconductor device may include a substrate constituted of an insulator; a first conductor film provided on a part of the substrate; a semiconductor chip located on the first conductor film; and an external connection terminal joined to the substrate via a joining layer at a position separated from the first conductor film. The semiconductor chip may be a power semiconductor chip including a main electrode and a signal electrode. The main electrode may be electrically connected to the first conductor film and the signal electrode may be electrically connected to the external connection terminal.
    Type: Application
    Filed: November 25, 2019
    Publication date: June 25, 2020
    Applicant: DENSO CORPORATION
    Inventors: Akinori SAKAKIBARA, Takanori KAWASHIMA, Takuya KADOGUCHI, Kohji URAMOTO, Yasuhiro OGAWA