Abstract: A junction field effect transistor includes a semiconductor body having a surface, relatively heavily doped source and drain regions of a first conductivity type disposed in the semiconductor body spaced from each other and reaching the surface, a channel layer of the first conductivity type disposed within the semiconductor body extending between and electrically connecting the source and drain regions, a gate region of a second conductivity type disposed within the semiconductor body extending from the surface to the channel layer and forming a rectifying junction with the channel layer, a relatively high resistivity region disposed within the semiconductor body between the surface and the channel layer, extending between the source and drain regions and surrounding the gate region, and source, gate, and drain electrodes disposed on the surface in contact with the source, gate, and drain regions, respectively.

Abstract: A field effect transistor chip for connection to a microstrip transmission line includes a semiconductor substrate, a field effect transistor formed in the substrate, source, gate, and drain electrodes disposed at least partially on the substrate, the gate and source electrodes forming an air bridge, and gate and drain beam leads extending from the substrate for electrical connection to the conductors of a microstrip transmission line. The microstrip transmission line includes dielectric substrates on which substantially uniform width conductors are disposed, the substrates being separated by a gap in which the transistor chip is disposed. The beam leads may be unitary with the electrodes of the chip or with the conductors of the transmission line.