Abstract: According to an aspect of an embodiment, a method of manufacturing a semiconductor device has forming an insulating layer comprising silica-based insulating material, processing the insulating layer, hydrophobizing the insulating layer by applying a silane compound to act on the insulating layer; and irradiating the insulating layer with light or an electron beam.

Abstract: A method of making a semiconductor device, including the steps of forming, upon a substrate, a semiconductor film, an insulating film, and a conductive film. Part of the upper surface of the conductive film is covered with a resist pattern so that the semiconductor film protrudes from the edges of the resist pattern. Then, the conductive film is etched using the resist pattern as a mask to leave a patterned conductive film, whereby side wall additives of reaction byproducts are generated. Next, the insulating film is etched using the patterned conductive film and side wall additives as a mask, and the side wall additives are removed. Then, impurities are implanted in the semiconductor film using the patterned conductive film as a mask so that impurities transmit through the insulating film, which expose on both sides of the patterned conductive film after removing the side wall additives. Finally, the resist pattern is removed.

Abstract: A current path pattern of semiconductor material is formed on the insulating principal surface of a substrate. A gate pattern three-dimensionally crosses the current path pattern in first and second cross areas. A channel region of the current path pattern is defined in an area superposed upon by the gate pattern. A gate insulating film is disposed between the current path pattern and gate pattern. The current path pattern has a lightly doped drain structure on both sides of the channel region in the first cross area, and is not provided with the lightly doped drain structure in regions in contact with the channel region in the second cross area. TFTs are provided having a small off-current and being not necessary for high precision position alignment during manufacture processes even if a gate length is short.

Abstract: A current path pattern of semiconductor material is formed on the insulating principal surface of a substrate. A gate pattern three-dimensionally crosses the current path pattern in first and second cross areas. A channel region of the current path pattern is defined in an area superposed upon by the gate pattern. A gate insulating film is disposed between the current path pattern and gate pattern. The current path pattern has a lightly doped drain structure on both sides of the channel region in the first cross area, and is not provided with the lightly doped drain structure in regions in contact with the channel region in the second cross area. TFTs are provided having a small off-current and being not necessary for high precision position alignment during manufacture processes even if a gate length is short.

Abstract: A liquid crystal display substrate including gate and drain bus lines that are electrically insulated from each other at cross areas, pixel electrodes between the cross areas, and first thin film transistors connecting corresponding drain bus lines and pixel electrodes. Each first thin film transistor includes a channel region where current flows in a first direction, and first and second impurity doped regions of, respectively, first and second impurity concentrations. The first and second doped regions sandwich the channel region. The second impurity concentration is higher than the first. Also, a second thin film transistor is formed in the peripheral circuit area, and includes a channel region where current flows in a second direction that is perpendicular to the first direction. Third impurity doped regions, disposed on both sides of the channel region, have a third impurity concentration.

Abstract: A current path pattern of semiconductor material is formed on the insulating principal surface of a substrate. A gate pattern three-dimensionally crosses the current path pattern in first and second cross areas. A channel region of the current path pattern is defined in an area superposed upon by the gate pattern. A gate insulating film is disposed between the current path pattern and gate pattern. The current path pattern has a lightly doped drain structure on both sides of the channel region in the first cross area, and is not provided with the lightly doped drain structure in regions in contact with the channel region in the second cross area. TFTs are provided having a small off-current and being not necessary for high precision position alignment during manufacture processes even if a gate length is short.

Abstract: A method for fabricating a superconductive film composed of a RE.sub.1 Ba.sub.2 Cu.sub.3 O.sub.x compound, or a (Bi.Sr.Ca.Cu.O) compound. In a first embodiment, oxides or carbonates of the component materials, namely Y.sub.2 O.sub.3, BaCO.sub.3, and CuO are mixed in atomic ratios of 1:2:3, according to the chemical formula of RE.sub.1 Ba.sub.2 Cu.sub.3 O.sub.x, and sintered to create a rhombic perovskite structure. The sintered mixture is powdered again, with added powdered amounts of Y.sub.2 O.sub.3 and powdered metallic Cu, and sintered. The sintered product is used as the source for an electron beam evaporator. In a second embodiment the (Bi.Sr.Ca.Cu.O) compound is formed into a sintered pellet which is composed of a mixture of one part of BiO, 3-15 parts of SrCO.sub.3, 4-30 parts of CaCO.sub.3, and 2-5 parts of CuO, in atomic ratios of Bi, Sr, Ca and Cu.