Abstract: The present invention provides a LSI being capable of testing a signal path between two circuit blocks by a scan isolation test. A scan isolation circuit 30-1 includes a first selector 31 alternating a held signal S33 or a signal SA from circuit block 10A and outputting the alternated signal thereof as signals 31, and a second selector 32 selecting the signal S31 or one signal from the signal SAm from outside or the previous-stage signal S33. Further, the held signal S33 held in the FF 33 thereof is supplied to the selector 31 and the next-stage scan isolation circuit 30-2, connecting the FF 33 to the output terminal. During the test therein, since the signal SA is held through the selectors 31 and 32, the signal path between the circuit blocks 10A and 10B can be conducted.

Abstract: A semiconductor integrated circuit has a plurality of signal paths and a plurality of scan separation circuits. Each scan separation circuit is provided on each signal path. Each scan separation includes a first selector and a second selector. The semiconductor integrated circuit also includes a first circuit block and a second circuit block. The first selector switches between a signal from the first circuit block and an output signal from a flip-flop provided in the scan separation circuit, and supplies the selected signal to the second circuit block. The selected signal is also supplied to the second selector. The second selector selects the signal from the first selector or a signal from outside (or a test signal supplied from an earlier-stage scan separation circuit). The output of the second selector is connected to a flip-flop. The test signal held by the flip-flop is supplied to the first selector and to a subsequent-stage scan separation circuit.