Patents by Inventor Koichi Hatanaka
Koichi Hatanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230315182Abstract: An electronic apparatus including a power generation module including a power generation unit and a battery configured to store power generated by the power generation unit, a detection device, a drive unit including a plurality of circuits including a circuit configured to output a voltage to the detection device based on the power of the power generation module, a second capacitor unit electrically coupled in parallel to the battery, and a portable housing configured to accommodate the power generation module, the detection device, the drive unit, and the second capacitor unit.Type: ApplicationFiled: March 30, 2023Publication date: October 5, 2023Applicant: SEIKO EPSON CORPORATIONInventors: Hiroshi UOZUMI, Koichi HATANAKA
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Patent number: 11609341Abstract: An electronic timepiece includes: a power source; a correlation computation unit executing correlation computation processing of sequentially computing a correlation value between a signal sample and a plurality of codes corresponding to a plurality of satellites; a power source voltage determination unit to which a voltage of a power source is inputted and which determines whether the inputted voltage is lower than a first threshold or not, or whether the voltage exceeds a second threshold set to be equal to or higher than the first threshold; and a correlation computation control unit controlling the correlation computation unit to interrupt the correlation computation processing when the power source voltage determination unit determines that the voltage is lower than the first threshold, and to resume the correlation computation processing when the power source voltage determination unit determines that the voltage exceeds the second threshold.Type: GrantFiled: January 23, 2020Date of Patent: March 21, 2023Inventors: Hiroshi Uozumi, Koichi Hatanaka
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Publication number: 20200241481Abstract: An electronic timepiece includes: a power source; a correlation computation unit executing correlation computation processing of sequentially computing a correlation value between a signal sample and a plurality of codes corresponding to a plurality of satellites; a power source voltage determination unit to which a voltage of a power source is inputted and which determines whether the inputted voltage is lower than a first threshold or not, or whether the voltage exceeds a second threshold set to be equal to or higher than the first threshold; and a correlation computation control unit controlling the correlation computation unit to interrupt the correlation computation processing when the power source voltage determination unit determines that the voltage is lower than the first threshold, and to resume the correlation computation processing when the power source voltage determination unit determines that the voltage exceeds the second threshold.Type: ApplicationFiled: January 23, 2020Publication date: July 30, 2020Inventors: Hiroshi UOZUMI, Koichi HATANAKA
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Patent number: 10320368Abstract: A ring oscillator circuit includes a plurality of first delay circuits each including X first delay elements, and a second delay circuit including a plurality of second delay elements different in delay amount from each other arranged in parallel to each other so as to be alternatively loaded, the plurality of first delay circuits and the second delay circuit are configured to be connected to each other in a ring-like manner, and X is an integer fulfilling X?1.Type: GrantFiled: March 1, 2017Date of Patent: June 11, 2019Assignee: SEIKO EPSON CORPORATIONInventor: Koichi Hatanaka
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Patent number: 9880285Abstract: A semiconductor device includes: a substrate; a first layer that is stacked on the substrate and includes an inductor; and a bump group that is arranged above the first layer, wherein the bump group includes a plurality of bumps that are arranged under a predetermined rule, and at least one bump that is different from the plurality of bumps and whose center does not overlap the inductor when the semiconductor device is viewed in a plan view from a direction vertical to a plane on which the bump group is provided.Type: GrantFiled: November 11, 2014Date of Patent: January 30, 2018Assignee: Seiko Epson CorporationInventors: Takeo Kitazawa, Koichi Hatanaka, Shigeto Chiba
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Publication number: 20170264272Abstract: A ring oscillator circuit includes a plurality of first delay circuits each including X first delay elements, and a second delay circuit including a plurality of second delay elements different in delay amount from each other arranged in parallel to each other so as to be alternatively loaded, the plurality of first delay circuits and the second delay circuit are configured to be connected to each other in a ring-like manner, and X is an integer fulfilling X?1.Type: ApplicationFiled: March 1, 2017Publication date: September 14, 2017Applicant: SEIKO EPSON CORPORATIONInventor: Koichi HATANAKA
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Publication number: 20160089567Abstract: A form analyzing device includes a storing section configured to store form information in the past in which detection results in the past of an inertia sensor (an inertia measuring unit) attached to the upper limb of a user or a hitting instrument held by the hand of the user and forms of swings of the user are associated, an estimating section configured to extract, from the storing section, the form information in the past corresponding to the present detection result of the inertia sensor, and a notifying section configured to notify the user of the present form information based on the form information in the past corresponding to the present detection result.Type: ApplicationFiled: September 8, 2015Publication date: March 31, 2016Inventor: Koichi HATANAKA
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Publication number: 20150130662Abstract: A semiconductor device includes: a substrate; a first layer that is stacked on the substrate and includes an inductor; and a bump group that is arranged above the the first layer, wherein the bump group includes a plurality of bumps that are arranged under a predetermined rule, and at least one bump that is different from the plurality of bumps and whose center does not overlap the inductor when the semiconductor device is viewed in a plan view from a direction vertical to a plane on which the bump group is provided.Type: ApplicationFiled: November 11, 2014Publication date: May 14, 2015Inventors: Takeo KITAZAWA, Koichi HATANAKA, Shigeto CHIBA
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Patent number: 8134255Abstract: A cancellation signal generation section generates a cancellation signal which cancels an alternating-current component of a power supply terminal voltage of a digital signal processing circuit section, and a synthesis section synthesizes the generated cancellation signal and a power supply voltage of an analog signal processing circuit section to cancel noise superimposed on the power supply voltage.Type: GrantFiled: December 19, 2007Date of Patent: March 13, 2012Assignee: Seiko Epson CorporationInventors: Koichi Hatanaka, Kazumi Matsumoto
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Publication number: 20090080669Abstract: A noise cancel method includes: generating a cancel signal which cancels a noise signal based on the noise signal generated from a receiving unit for receiving a wireless signal; generating an amplification signal produced by amplifying a reception signal inputted to the receiving unit; and generating an addition signal produced by adding the amplification signal and the cancel signal.Type: ApplicationFiled: September 12, 2008Publication date: March 26, 2009Applicant: SEIKO EPSON CORPORATIONInventors: Koichi HATANAKA, Tadashi AIZAWA
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Publication number: 20080157862Abstract: A coil section detects undesirable radiation generated from a baseband process circuit section mounted at a specific position on a substrate, the coil section including a wire with a specific shape that is disposed at a position close to the baseband process circuit section, and a cancellation signal generation section generates a signal that cancels the undesirable radiation detected by the coil section.Type: ApplicationFiled: December 18, 2007Publication date: July 3, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Koichi HATANAKA, Kazumi MATSUMOTO
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Publication number: 20080157863Abstract: A cancellation signal generation section generates a cancellation signal which cancels an alternating-current component of a power supply terminal voltage of a digital signal processing circuit section, and a synthesis section synthesizes the generated cancellation signal and a power supply voltage of an analog signal processing circuit section to cancel noise superimposed on the power supply voltage.Type: ApplicationFiled: December 19, 2007Publication date: July 3, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Koichi HATANAKA, Kazumi MATSUMOTO
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Publication number: 20060293010Abstract: A composition purpose signal generating apparatus, which includes an oscillator for outputting a composition purpose signal, a frequency divider for dividing the frequency of the composition purpose signal, a reference oscillator for outputting a reference signal, a phase comparator for outputting phase difference data which indicates a phase difference between the composition purpose signal and the reference signal, and a filter for outputting the phase difference data output from the phase comparator as a control voltage of the oscillator, comprises composition purpose signal frequency changing means for changing the frequency of the composition purpose signal when the frequency of a composite wave consisting of a basic wave or harmonic constituting a communication signal, which is an interference wave to the receiving signal, and a basic wave or harmonic constituting the composition purpose signal is almost equal to the frequency of the intermediate frequency signal.Type: ApplicationFiled: May 22, 2006Publication date: December 28, 2006Applicant: Seiko Epson CorporationInventor: Koichi Hatanaka
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Patent number: 5078976Abstract: A disinfectant vaporizing apparatus for dropwise flowing a disinfectant liquid on a heating unit so as to provide a uniform disinfection gas on a surface of a material to be sterilized, characterized in that at least one supply port for supplying heated carrier gas at a high temperature is provided in a vaporization chamber for the disinfectant liquid. A vaporization part is provided with a plurality of cavities on an upper surface thereof and at least one dropping nozzle is provided above each cavity, wherein the disinfection gas carried by the heated carrier gas is applied on a surface of a material to be sterilized through a droplet splash removing apparatus. The droplet splash removing apparatus has a series of vertically, spaced-apart shield plates with staggered holes therein through which the vaporized disinfectant and carrier gas pass and entrained droplets of disinfectant liquid are removed.Type: GrantFiled: December 16, 1988Date of Patent: January 7, 1992Assignee: Snow Brand Milk Products Co., Ltd.Inventors: Yoshito Shibauchi, Koichi Hatanaka, Tasuo Tanaka
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Patent number: 5053196Abstract: A rotatable partition is provided to establish a sealing relationship between each pair of successive processes in a germ-free filling/packaging system or between a said processes and the outer air and a hollow cylinder containing therein this rotatable partition is provided with an inlet through which germ-free gas flows in and an outlet through which germ-free gas flows out. Floor(s) of a germicide mist fixing station and/or a germicide removing station, and/or conveyor arms is (are) provided heater elements.Type: GrantFiled: July 19, 1989Date of Patent: October 1, 1991Assignee: Snow Brand Milk Products Co., Ltd.Inventors: Takeo Ide, Koichi Hatanaka
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Patent number: 4969915Abstract: An outer container is detachable mounted on a neck of an inner container having its interior previously sterilized and sealed with a portion of the inner container underlying the neck being sealed. Such container assembly of double structure is sterilized and dried, then transferred into a germ-free filling chamber isolated from the atmosphere here the top of the inner container is cut off, then the inner container is filled with food or drink and the cut off portion is sealed again. Finally the outer container is separated from the inner container outside the germ-free filling chamber.Type: GrantFiled: July 19, 1989Date of Patent: November 13, 1990Assignee: Snow Brand Milk Products Co., Ltd.Inventors: Koichi Hatanaka, Takeo Ide
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Patent number: 4797255Abstract: A hydrogen peroxide gas maintained at a temperature which is higher than its condensing temperature at the least is admitted to a surface of an object to be sterilized, the hydrogen peroxide gas is condensed on the surface of the object maintained at a temperature below the condensing temperature to sterilize the object, and thereafter the hydrogen peroxide is removed by hot air.Type: GrantFiled: March 16, 1987Date of Patent: January 10, 1989Assignee: Snow Brand Milk Products Co., Ltd.Inventors: Koichi Hatanaka, Yoshito Shibauchi