Patents by Inventor Koichi Isaji

Koichi Isaji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10785868
    Abstract: A multilayer printed wiring board includes a core substrate, a first buildup layer, and a second buildup layer. The first buildup layer includes a first insulating layer and a first conductor layer alternately laminated with each other. The second buildup layer includes a second insulating layer and a second conductor layer alternately laminated with each other. The core substrate, the first insulating layer, and the second insulating layer each include a glass cloth. The glass cloth is woven with warp threads and weft threads. The warp threads each have a width narrower a width of each of the weft threads. Each of the warp threads constituting the glass cloth in the first insulating layer and the second insulating layer both lying adjacent to the core substrate is arranged perpendicular to each of the warp threads constituting the glass cloth in the core substrate.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: September 22, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kenichi Toshimitsu, Daisuke Nii, Koichi Isaji, Hiroyuki Fujisawa, Yoshihiko Nakamura
  • Publication number: 20200092994
    Abstract: A multilayer printed wiring board includes a core substrate, a first buildup layer, and a second buildup layer. The first buildup layer includes a first insulating layer and a first conductor layer alternately laminated with each other. The second buildup layer includes a second insulating layer and a second conductor layer alternately laminated with each other. The core substrate, the first insulating layer, and the second insulating layer each include a glass cloth. The glass cloth is woven with warp threads and weft threads. The warp threads each have a width narrower a width of each of the weft threads. Each of the warp threads constituting the glass cloth in the first insulating layer and the second insulating layer both lying adjacent to the core substrate is arranged perpendicular to each of the warp threads constituting the glass cloth in the core substrate.
    Type: Application
    Filed: July 27, 2017
    Publication date: March 19, 2020
    Inventors: KENICHI TOSHIMITSU, DAISUKE NII, KOICHI ISAJI, HIROYUKI FUJISAWA, YOSHIHIKO NAKAMURA
  • Patent number: 5867148
    Abstract: An information processing apparatus includes in its body at least a power supply unit, a disk type storage and a printed circuit board arranged in a predetermined order and further has a keyboard unit which can be sandwiched between the display unit and a keyboard unit supporting portion extending from the body by pivotally moving the display unit. A detector for detecting the detachment of the keyboard unit from the body may be provided to restrict the range of pivotal movement of the display unit in accordance with a detection signal of the detector. Further, the display unit may be provided with pilot light emitting portions, thereby making it possible to recognize a condition of the information processing apparatus.
    Type: Grant
    Filed: July 10, 1992
    Date of Patent: February 2, 1999
    Assignees: Hitachi, Ltd., Hitachi Video & Information System, Inc.
    Inventors: Hideki Kamimaki, Kiyokazu Nishioka, Koichi Kimura, Takashi Maruyama, Tsuguji Tachiuchi, Koichi Isaji, Tsuyoshi Nakagawa, Nobuo Tsuchiya, Yoshiyuki Amano, Taisuke Kashima, Akira Takahashi, Tadashi Kyoda, Ryooichi Mizuno
  • Patent number: 5812859
    Abstract: An information processing apparatus having a work suspend/resume function which allows operator to use a main memory shared by different processings even when work suspension information is saved therein. A system for allowing a same operational environment as that set up in one information processing apparatus to be easily implemented in another information processing apparatus. A main memory used by a CPU for execution of processings has a function for storing information concerning the state of the information processing apparatus prevailing at a time point when execution of a given processing is suspended by a CPU for allowing the suspended processing to be performed in continuation later on. When the suspension state information has already been stored in the main memory by a former user, the suspension state information is transferred to a removable nonvolatile storage device so that the CPU can perform other processing than the suspended one by using the main memory.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: September 22, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Kamimaki, Koichi Isaji, Masatomi Sasaki, Koichi Kimura, Takayuki Tamura, Tsuguji Tachiuchi
  • Patent number: 5511201
    Abstract: A data processing apparatus which includes a display unit and a power supply controller for supplying power to the display unit. The display unit has a display screen and a back light controller. The power supply controller comprises a switch, at least one output line for receiving the power from the switch and for supplying therethrough the power to electronic devices, a delay circuit for receiving the power from the switch and when the switch is turned ON to start supply of the power, for outputting the power after passage of a predetermined time from the start of the power supply, and a second output line for supplying the power from the delay circuit to the back light controller therethrough.
    Type: Grant
    Filed: March 25, 1992
    Date of Patent: April 23, 1996
    Assignees: Hitachi, Ltd., Hitachi Video & Information System, Inc.
    Inventors: Hideki Kamimaki, Kiyokazu Nishioka, Tsuguji Tachiuchi, Nobuo Tsuchiya, Masahiro Jinushi, Hitoshi Sadamitsu, Hiroshi Ito, Takashi Yoshitomi, Koichi Isaji, Takao Ohba
  • Patent number: 5390293
    Abstract: An information processing equipment capable of multicolor display, comprising a CPU; a display memory which stores display information therein; a display unit which displays the display information in multiple colors selected from a predetermined number of colors to-be-developed; a display control circuit which controls transfer of information between the CPU and the display memory, and which regularly reads out the display information stored in the display memory and then sends the read-out display information to the display unit; a mode selector which selects one of at least two modes consisting of a first mode and a second mode, and which produces selection information, wherein the first mode causes the display unit to develop a smaller number of multiple colors and to operate at a lower frequency, while the second mode causes the display unit to develop a large number of multiple colors and to operate at a higher frequency; a clock signal generator which generates a plurality of clock signals of unequal f
    Type: Grant
    Filed: August 17, 1993
    Date of Patent: February 14, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Kiyokazu Nishioka, Hideki Kamimaki, Tsutomu Furuhashi, Kohji Takahashi, Bunichi Fujimaki, Koichi Isaji
  • Patent number: 4757190
    Abstract: A photosensor provided with a transistor having a bias element connected between the emitter and the collector, a light emitting element connected in series to said transistor, and a photosensitive element for receiving light emitted by said light emitting element and transforming it into electric current, with one end connected with said transistor. Owing to this construction, since only two interface lines are needed, one being the line for feeding the transistor with electric power and the other being the line of taking out the output of said photo sensitive element, the number of interface lines is reduced and thus the realization is simplified. Since the current flowing through the photosensitive element is so controlled that it is amplfiied and applied to the light emitting element, the output of the photosensitive element is considerably increased.
    Type: Grant
    Filed: January 15, 1986
    Date of Patent: July 12, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Toshinobu Ando, Koichi Isaji