Patents by Inventor Koichi Kihara
Koichi Kihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240092890Abstract: A bispecific antibody including a first domain which specifically binds to a mutant calreticulin protein and a second domain which specifically binds to a CD3 antigen. A pharmaceutical composition including the bispecific antibody or a functional fragment thereof. A diagnostic method for a myeloproliferative neoplasm, including detecting a polypeptide in a biological sample with the bispecific antibody.Type: ApplicationFiled: August 26, 2021Publication date: March 21, 2024Applicants: JUNTENDO EDUCATIONAL FOUNDATION, MEIJI SEIKA PHARMA CO., LTD.Inventors: Norio KOMATSU, Marito ARAKI, Yoshihiko KIHARA, Yoji ISHIDA, Koichi KITAMURA, Takayoshi FUKUSHIMA, Kaori YASUI
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Patent number: 8073133Abstract: An echo canceler has an adaptive filter that generates an echo replica signal from a far-end signal. The filter coefficients of the adaptive filter are updated according to a residual error signal, which is obtained by subtracting the echo replica signal from a near-end signal to cancel echo. A background noise estimator estimates the near-end background noise power level from the residual error signal. A step size calculator uses the estimated near-end background noise power in determining the step size of the adaptive updating of the filter coefficients. When the estimated near-end background noise level is high, a small step size is used, which improves echo cancellation under these conditions. When the estimated near-end background noise level is low, a larger step size is used to permit rapid convergence of the filter coefficients.Type: GrantFiled: October 23, 2007Date of Patent: December 6, 2011Assignee: Oki Electric Industry Co., Ltd.Inventors: Takashi Ishiguro, Koichi Kihara, Yuzuru Masuya, Junji Arai
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Patent number: 7715374Abstract: A redundancy gateway system that can avoid short interruption of data communication caused by system switching in gateway units configured in a multiplex manner for a plurality of systems, and that can maintain the communication state prior to the system switching and avoid degradation of communication quality. A duplicate of a received packet is generated, thereby supplying the packet of the same content to a configuration of gateway units. For each packet, a common write pointer corresponding to identification information appended to the packet is generated. Each gateway unit writes the packet to its own jitter buffer in accordance with the common write pointer corresponding to each supplied packet, sequentially reads out the written packet from the jitter buffer, and generates a TDM signal. One of the gateway units is selectively switched and only the TDM signal generated by the one gateway unit is supplied to a TDM network.Type: GrantFiled: December 10, 2007Date of Patent: May 11, 2010Assignee: Oki Electric Industry Co. Ltd.Inventors: Yuzuru Masuya, Koichi Kihara, Koichi Yamazaki, Takashi Ishiguro, Yasuhiro Tazoi, Junji Arai, Takeshi Shimomura
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Publication number: 20090046730Abstract: A network switching apparatus which is provided between a redundancy gateway system and a packet network and enables an uninterruptible changeover in a system changeover to be performed. The apparatus includes an up-direction transfer unit and a down-direction transfer unit. The down-direction transfer unit receives a changeover notification packet accompanied with designation information of a new active system gateway apparatus which has newly been set in place of an active system gateway apparatus. After the reception of the changeover notification packet, only in the case where a down-direction packet which is newly transmitted by the packet network is accompanied with designation information of the active system gateway apparatus before the changeover, the down-direction transfer unit changes the designation information to the designation information of the new active system gateway apparatus, thereby transferring the down-direction packet to the new active system gateway apparatus.Type: ApplicationFiled: June 20, 2008Publication date: February 19, 2009Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventors: Takeshi Shimomura, Yuzuru Masuya, Koichi Kihara
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Publication number: 20080175375Abstract: An echo canceler has an adaptive filter that generates an echo replica signal from a far-end signal. The filter coefficients of the adaptive filter are updated according to a residual error signal, which is obtained by subtracting the echo replica signal from a near-end signal to cancel echo. A background noise estimator estimates the near-end background noise power level from the residual error signal. A step size calculator uses the estimated near-end background noise power in determining the step size of the adaptive updating of the filter coefficients. When the estimated near-end background noise level is high, a small step size is used, which improves echo cancellation under these conditions. When the estimated near-end background noise level is low, a larger step size is used to permit rapid convergence of the filter coefficients.Type: ApplicationFiled: October 23, 2007Publication date: July 24, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventors: Takashi Ishiguro, Koichi Kihara, Yuzuru Masuya, Junji Arai
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Publication number: 20080151915Abstract: A redundancy gateway system that can avoid, to the maximum extent, short interruption of data communication caused by system switching in gateway units configured in a multiplex manner for a plurality of systems, and that can maintain the communication state prior to the system switching and avoid degradation of communication quality. A duplicate of a received packet is generated, thereby supplying the packet of the same content to a plurality of gateway units. For each packet, a common write pointer corresponding to identification information appended to the packet is generated. Each of the plurality of gateway units writes the packet to its own jitter buffer in accordance with the common write pointer corresponding to each supplied packet, sequentially reads out the written packet from the jitter buffer, and generates a TDM signal. One of the plurality of gateway units is selectively switched and only the TDM signal generated by the one gateway unit is supplied to a TDM network.Type: ApplicationFiled: December 10, 2007Publication date: June 26, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventors: Yuzuru MASUYA, Koichi KIHARA, Koichi YAMAZAKI, Takashi ISHIGURO, Yasuhiro TAZOI, Junji ARAI, Takeshi SHIMOMURA
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Network bridge using only hardware to process media access control (MAC) packet-switching operations
Patent number: 5926626Abstract: A bridge device for connecting networks together via data link layers, that assigns input port numbers unique to each port, to headers of input memory access control packets. A content-addressable memory stores destination addresses and groups of port numbers corresponding to the destination addresses. A determiner such as a controller determines whether or not a destination address of a memory access control packet is stored in the memory and determines whether or not a port number corresponding to the destination address coincides with an input port number of the memory access control packet. Based on the determinations made by the determiner, a selector selects one of the following as an output port number: either a port number corresponding to the destination address, or a port number designating all ports other than the input port, or a port number not designating any ports. An output port number assigner assigns an output port number to a memory access control port.Type: GrantFiled: March 28, 1997Date of Patent: July 20, 1999Assignee: OKI Electric Industry Co., Ltd.Inventors: Yorihisa Takeuchi, Koichi Kihara, Kenichi Uchino, Jiro Asoh