Patents by Inventor Koichi Mita

Koichi Mita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9319162
    Abstract: A signal processor includes a period detection section which detects that a period is currently used for communication of a frame; a pattern detection section which detects, from the received signal, a first signal pattern by which the end of communication of the frame is recognized; and an output processing section which outputs the received signal to a controller; configured to instruct, upon detection of the first signal pattern in the period being currently used for communication of a frame, the controller to halt startup of communication action of the next frame, until the period being currently used for communication of a frame comes to the end, to thereby reduce an event such that frames are transmitted from a plurality of communication devices simultaneously, and to thereby allow the communication action for the next frame to proceed correctly.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: April 19, 2016
    Assignee: Cypress Semiconductor Corporation
    Inventors: Akira Shimamura, Koichi Mita, Takashi Arai, Hideshi Fujishima, Akira Endo
  • Patent number: 8897289
    Abstract: A node system includes a first node, a second node, and a supervisory node which transmit frames while increasing or decreasing the cycle microtick count, and determines reduced cycle microtick counts by subtracting or adding a rate correction limit value from or to the cycle microtick count of the supervisory node when reception of the first frame transmitted by the first node stop and the cycle microtick count of the supervisory node when reception of the first and second frames stop.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: November 25, 2014
    Assignee: Spansion LLC
    Inventors: Kenji Suina, Takashi Arai, Koichi Mita, Akira Shimamura, Hidetoshi Ishikawa, Takashi Moriya, Yuuki Nozawa, Hideki Kondo
  • Publication number: 20140286330
    Abstract: A node system includes a first node, a second node, and a supervisory node which transmit frames while increasing or decreasing the cycle microtick count, and determines reduced cycle microtick counts by subtracting or adding a rate correction limit value from or to the cycle microtick count of the supervisory node when reception of the first frame transmitted by the first node stop and the cycle microtick count of the supervisory node when reception of the first and second frames stop.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 25, 2014
    Applicant: Spansion LLC
    Inventors: Kenji Suina, Takashi ARAI, Koichi MITA, Akira SHIMAMURA, Hidetoshi ISHIKAWA, Takashi MORIYA, Yuuki NOZAWA, Hideki KONDO
  • Publication number: 20140153589
    Abstract: A signal processor includes a period detection section which detects that a period is currently used for communication of a frame; a pattern detection section which detects, from the received signal, a first signal pattern by which the end of communication of the frame is recognized; and an output processing section which outputs the received signal to a controller; configured to instruct, upon detection of the first signal pattern in the period being currently used for communication of a frame, the controller to halt startup of communication action of the next frame, until the period being currently used for communication of a frame comes to the end, to thereby reduce an event such that frames are transmitted from a plurality of communication devices simultaneously, and to thereby allow the communication action for the next frame to proceed correctly.
    Type: Application
    Filed: November 20, 2013
    Publication date: June 5, 2014
    Applicant: Spansion LLC
    Inventors: Akira SHIMAMURA, Koichi MITA, Takashi ARAI, Hideshi FUJISHIMA, Akira ENDO
  • Patent number: 8718038
    Abstract: A node system includes a first node, a second node, and a supervisory node which transmit frames while increasing or decreasing the cycle microtick count, and determines reduced cycle microtick counts by subtracting or adding a rate correction limit value from or to the cycle microtick count of the supervisory node when reception of the first frame transmitted by the first node stop and the cycle microtick count of the supervisory node when reception of the first and second frames stop.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: May 6, 2014
    Assignee: Spansion LLC
    Inventors: Kenji Suina, Takashi Arai, Koichi Mita, Akira Shimamura, Hidetoshi Ishikawa, Takashi Moriya, Yuuki Nozawa, Hideki Kondo
  • Patent number: 8605756
    Abstract: A signal processor includes a period detection section which detects that a period is currently used for communication of a frame; a pattern detection section which detects, from the received signal, a first signal pattern by which the end of communication of the frame is recognized; and an output processing section which outputs the received signal to a controller, configured to instruct, upon detection of the first signal pattern in the period being currently used for communication of a frame, the controller to halt startup of communication action of the next frame, until the period being currently used for communication of a frame comes to the end, to thereby reduce an event such that frames are transmitted from a plurality of communication devices simultaneously, and to thereby allow the communication action for the next frame to proceed correctly.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: December 10, 2013
    Assignee: Spansion LLC
    Inventors: Akira Shimamura, Koichi Mita, Takashi Arai, Hideshi Fujishima, Akira Endo
  • Patent number: 8582681
    Abstract: A signal receiver apparatus includes a waveform shaping data storage device storing waveform shaping data of a signal transmitted with a given timing from a signal transmitter device of a plurality of signal transmitter devices which are coupled to the signal receiver apparatus for each of the plurality of signal transmitter devices, and a waveform shaping device reading waveform shaping data of the signal transmitter device in the plurality of signal transmitter device from the waveform shaping data storage device when a signal from the signal transmitter device is received, and shaping a waveform of a received signal from the signal transmitter device.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 12, 2013
    Assignee: Spansion LLC
    Inventors: Akira Shimamura, Koichi Mita, Hideshi Fujishima, Takashi Arai, Shunichi Ko, Takuya Terasawa, Koji Mikami, Naoya Komada
  • Patent number: 8311054
    Abstract: A transmitting/receiving system includes a control field controlling a transmitting priority of a dynamic slot is included in each communication cycle, and a node of the transmitting/receiving system sets control information including a preferential usage request for a dynamic slot that the node transmits in the control field and notifies all nodes in the transmitting/receiving system of the preferential usage request for the dynamic slot.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 13, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Takuya Terasawa, Takashi Arai, Shunichi Ko, Koichi Mita, Akira Shimamura, Koji Mikami, Naoya Komada
  • Publication number: 20120134457
    Abstract: A node system includes a first node, a second node, and a supervisory node which transmit frames while increasing or decreasing the cycle microtick count, and determines reduced cycle microtick counts by subtracting or adding a rate correction limit value from or to the cycle microtick count of the supervisory node when reception of the first frame transmitted by the first node stop and the cycle microtick count of the supervisory node when reception of the first and second frames stop.
    Type: Application
    Filed: August 26, 2011
    Publication date: May 31, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Kenji SUINA, Takashi ARAI, Koichi MITA, Akira SHIMAMURA, Hidetoshi ISHIKAWA, Takashi MORIYA, Yuuki NOZAWA, Hideki KONDO
  • Publication number: 20100208755
    Abstract: A signal processor includes a period detection section which detects that a period is currently used for communication of a frame; a pattern detection section which detects, from the received signal, a first signal pattern by which the end of communication of the frame is recognized; and an output processing section which outputs the received signal to a controller, configured to instruct, upon detection of the first signal pattern in the period being currently used for communication of a frame, the controller to halt startup of communication action of the next frame, until the period being currently used for communication of a frame comes to the end, to thereby reduce an event such that frames are transmitted from a plurality of communication devices simultaneously, and to thereby allow the communication action for the next frame to proceed correctly.
    Type: Application
    Filed: April 28, 2010
    Publication date: August 19, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Akira SHIMAMURA, Koichi Mita, Takashi Arai, Hideshi Fujishima, Akira Endo
  • Publication number: 20090225901
    Abstract: A signal receiver apparatus includes a waveform shaping data storage device storing waveform shaping data of a signal transmitted with a given timing from a signal transmitter device of a plurality of signal transmitter devices which are coupled to the signal receiver apparatus for each of the plurality of signal transmitter devices, and a waveform shaping device reading waveform shaping data of the signal transmitter device in the plurality of signal transmitter device from the waveform shaping data storage device when a signal from the signal transmitter device is received, and shaping a waveform of a received signal from the signal transmitter device.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 10, 2009
    Applicant: Fujitsu Microelectronics Limited
    Inventors: Akira Shimamura, Koichi Mita, Hideshi Fujishima, Takashi Arai, Shunichi Ko, Takuya Terasawa, Koji Mikami, Naoya Komada
  • Publication number: 20090213870
    Abstract: A transmitting/receiving system includes a control field controlling a transmitting priority of a dynamic slot is included in each communication cycle, and a node of the transmitting/receiving system sets control information including a preferential usage request for a dynamic slot that the node transmits in the control field and notifies all nodes in the transmitting/receiving system of the preferential usage request for the dynamic slot.
    Type: Application
    Filed: March 24, 2009
    Publication date: August 27, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Takuya TERASAWA, Takashi Arai, Shunichi Ko, Koichi Mita, Akira Shimamura, Koji Mikami, Naoya Komada
  • Patent number: 7542480
    Abstract: In a communication device which can realize a protocol conversion by a single device without preparing respective packages for existing various protocols, a protocol attribute included in a packet received is detected, protocol processing order data indicating a protocol processing order based on the protocol attribute are generated, and a plurality of protocols within the received packet are processed based on the protocol processing order data.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: June 2, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Katsuya Shirota, Akira Shimamura, Masakazu Nakamura, Koichi Mita, Takashi Arai, Hideaki Watanabe, Kazuki Mishima, Ryuichi Hiroi
  • Publication number: 20050025178
    Abstract: In a communication device which can realize a protocol conversion by a single device without preparing respective packages for existing various protocols, a protocol attribute included in a packet received is detected, protocol processing order data indicating a protocol processing order based on the protocol attribute are generated, and a plurality of protocols within the received packet are processed based on the protocol processing order data.
    Type: Application
    Filed: September 1, 2004
    Publication date: February 3, 2005
    Inventors: Katsuya Shirota, Akira Shimamura, Masakazu Nakamura, Koichi Mita, Takashi Arai, Hideaki Watanabe, Kazuki Mishima, Ryuichi Hiroi