Abstract: This invention is a solid-state image pickup device that solves the problem of limited dynamic range in the high luminance region in an image sensor having white pixels. White pixels or yellow pixels and at least red pixels, green pixels or blue pixels are arranged in array form on the light receiving surface of a semiconductor substrate. White pixels or yellow pixels have an additional capacitance CS connected to the photodiode via the floating diffusion, a capacitance coupling transistor S that can couple or separate the floating diffusion and the additional capacitance. The proportion of white or yellow pixels to the total number of pixels is higher in a central portion of the light receiving surface than a peripheral portion. The white or yellow pixel may share a floating diffusion with a red, green or blue pixel.

Abstract: This invention is a solid-state image pickup device that solves the problem of limited dynamic range in the high luminance region in an image sensor having white pixels. White pixels or yellow pixels and at least red pixels, green pixels or blue pixels are arranged in array form on the light receiving surface of a semiconductor substrate. White pixels or yellow pixels have an additional capacitance CS connected to the photodiode via the floating diffusion, a capacitance coupling transistor S that can couple or separate the floating diffusion and the additional capacitance. The proportion of white or yellow pixels to the total number of pixels is higher in a central portion of the light receiving surface than a peripheral portion. The white or yellow pixel may share a floating diffusion with a red, green or blue pixel.

Abstract: A solid-state imaging device having contacts for a charge sweeping component or the like, with which increases in dark current can be suppressed while increases in contact resistance and the production of alloy spikes can be prevented, and a method for manufacturing this device. A solid-state imaging device has a charge accumulator for producing and accumulating signal charges when light is received, and a charge transfer component for transferring these signal charges, including a conductive layer 18 formed on a substrate 10, such as a silicon layer or metal wiring; an insulating film 21 formed over the conductive layer 18; an opening CH formed over the insulating film 21 and leading to the conductive layer 18; and a wiring layer 34 composed of aluminum containing copper in an amount between 0.4 and 5 wt %, formed at least inside the opening CH contiguously with the surface of the conductive layer 18.

Abstract: Object: To provide a solid-state imaging device having contacts for a charge sweeping component or the like, with which increases in dark current can be suppressed while increases in contact resistance and the production of alloy spikes can be prevented, and to provide a method for manufacturing this device.

Abstract: A stacked film assembly for use as wiring in a semiconductor device having a bottom film (CVD-W film) 33 and a top film (Al alloy film) 12, where the surface roughness (Ra) of the bottom film is less than 100 .ANG. and the crystal orientation of the top film formed on this surface is controlled, a CVD method for the making thereof, and a semiconductor device in which the stacked film assembly is employed. Even when there is no lattice matching of the bottom film and the top film, crystal orientation of the top film can be sufficiently controlled to provide a targeted face ((111) face with aluminum film), and in particular it will be possible to readily form a stacked film assembly having a satisfactory barrier function as well as sufficient EM resistance and with good film formation.

Abstract: A stacked film assembly for use as wiring in a semiconductor device having a bottom film (CVD-W film) 33 and a top film (Al alloy film) 12, where the surface roughness (Ra) of the bottom film is less than 100 .ANG. and the crystal orientation of the top film formed on this surface is controlled, a CVD method for the making thereof, and a semiconductor device in which the stacked film assembly is employed. Even when there is no lattice matching of the bottom film and the top film, crystal orientation of the top film can be sufficiently controlled to provide a targeted face ((111) face with aluminum film), and in particular it will be possible to readily form a stacked film assembly having a satisfactory barrier function as well as sufficient EM resistance and with good film formation.

Abstract: In order to form an ohmic contacts to both the n+ and the p+ doped regions of complementary metal oxide semiconductor substrate regions of the an integrated circuit device, wells (contact holes) are formed in the insulating using a hard mask poly-Si layer on an insulating region exposing the doped substrate regions. A TiSi.sub.x layer is formed on the walls and base of the well either by physical vapor deposition or is formed by combining a layer of poly-Si with a layer of Ti. The TiSi.sub.2 is diffused into the doped region during an annealing step. In addition, the TiSi.sub.2 layer is converted into the low resistivity C54 configuration in an annealing step.