Abstract: A plasma display panel can reduce a discharge delay in address discharge, thereby performing high-speed addressing in a stable manner. A front substrate (1) and a back substrate (2) are disposed to face each other, and a discharge space (3) is formed and partitioned by barrier ribs (10) so as to form priming discharge cells (17) and main discharge cells (11). A clearance (19) is provided between the barrier ribs (10) of the priming discharge cells (17) and the front substrate (1), and priming particles generated in the priming discharge cells (17) are supplied to the main discharge cells (11) through the clearance (19), whereby a PDP performing high-speed addressing is obtained.

Abstract: A film sheet feeding mechanism which can be reduced in size, and which can stably conduct a feeding operation, and a thermal development recording apparatus having such a mechanism are provided. A film sheet feeding mechanism that, from a tray on which plural film sheets are stacked, takes out one by one a uppermost film sheet, and that feeds the film sheet toward a downstream side in a direction of transporting the film sheet, includes: a feeding arm having film sucking unit for taking out the film sheet in the tray; arm moving unit for, while supporting the feeding arm, moving the feeding arm between a film taking out position of the tray and a film supplying position on the downstream side in the transportation direction; and a lifting and lowering amplification mechanism which is disposed in the feeding arm, and which lifts and lowers the film sucking unit.

Abstract: A ballistic semiconductor device of the present invention comprises a n-type emitter layer (102), a base layer (305) made of n-type InGaN, a n-type collector layer (307), an emitter barrier layer (103) interposed between the emitter layer (102) and the base layer (305) and having a band gap larger than that of the base layer (305), and a collector barrier layer (306) interposed between the base layer (305) and the collector layer (307) and having a band gap larger than that of the base layer (305), and operates at 10 GHz or higher.

Abstract: The present invention relates to a semiconductor device having a multi-layered structure comprising an emitter layer, a base layer, and a collector layer, each composed of a group III-V n-type compound semiconductor in this order; a quantum dot barrier layer disposed between the emitter layer and the base layer; a collector electrode, a base electrode and the emitter layer all connected to an emitter electrode; the quantum dot barrier layer having a plurality of quantum dots being sandwiched between first and second barrier layers from the emitter layer side and the base layer side, respectively and each having a portion that is convex to the base layer; a base layer side interface in the second barrier layer, and collector layer side and emitter layer side interfaces in the base layer having curvatures that are convex to the collector layer corresponding to the convex portions of the quantum dots.

Abstract: The variable attenuator includes two transmission lines placed so as to be opposite to each other with space in between; a ground electrode which is grounded; a resistor which is connected to opposing ends of the two transmission lines as well as to the ground electrode; and a control electrode which adjoins to a part of the resistor between the opposing ends of the transmission lines and said ground electrode.

Abstract: A ballistic semiconductor device of the present invention comprises a n-type emitter layer (102), a base layer (305) made of n-type InGaN, a n-type collector layer (307), an emitter barrier layer (103) interposed between the emitter layer (102) and the base layer (305) and having a band gap larger than that of the base layer (305), and a collector barrier layer (306) interposed between the base layer (305) and the collector layer (307) and having a band gap larger than that of the base layer (305), and operates at 10 GHz or higher.

Abstract: A two-system PLL frequency synthesizer includes, a first PLL frequency synthesizer connected with a power line, a current amount controller having a first constant current source connected between the first PLL frequency synthesizer and a ground line, and a constant current source controller for controlling the current of the first constant current source so as to change it gradually, and a series-connected circuit of a second PLL frequency synthesizer and a second constant current source, connected between the power line and the ground line.

Abstract: A film sheet feeding mechanism which can be reduced in size, and which can stably conduct a feeding operation, and a thermal development recording apparatus having such a mechanism are provided. A film sheet feeding mechanism that, from a tray on which plural film sheets are stacked, takes out one by one a uppermost film sheet, and that feeds the film sheet toward a downstream side in a direction of transporting the film sheet, includes: a feeding arm having film sucking unit for taking out the film sheet in the tray; arm moving unit for, while supporting the feeding arm, moving the feeding arm between a film taking out position of the tray and a film supplying position on the downstream side in the transportation direction; and a lifting and lowering amplification mechanism which is disposed in the feeding arm, and which lifts and lowers the film sucking unit.

Abstract: The present invention provides a switching device comprising first to third connection terminals, a first FET provided with a pair of terminals one of which is connected, via a first direct-current blocking capacitive element, to the first connection terminal and the other of which is connected, via another first direct-current blocking capacitive element, to the second connection terminal, and a second FET provided with a pair of terminals one of which is connected, via a second direct-current blocking capacitive element, to the first connection terminal and the other of which is connected, via another second direct-current blocking capacitive element, to the third connection terminal. The channel type of the first FET is the same as the channel type of the second FET. A first bias voltage is applied to a gate of the first FET, and a second bias voltage is applied to both the main terminals of the second FET.

Abstract: A plasma oscillation switching device of the present invention comprises semiconductor substrate 101; first barrier layer 103 that is composed of a III-V compound semiconductor and formed on the substrate; channel layer 104 that is composed of a III-V compound semiconductor and formed on the first barrier layer; second barrier layer 105 that is composed of a III-V compound semiconductor and formed on the channel layer; source electrode 107, gate electrode 109 and drain electrode 108 provided on the second barrier layer, wherein the first barrier layer includes n-type diffusion layer 103a, the second barrier layer includes p-type diffusion layer 105a, the band gap of the channel layer is smaller than the band gaps of the first and the second barrier layers, two-dimensional electron gas EG is accumulated at the conduction band at the boundary between the first barrier layer and the channel layer, two-dimensional hole gas HG is accumulated at the valence band at the boundary between the second barrier layer and

Abstract: A plasma display panel can reduce a discharge delay in address discharge, thereby performing high-speed addressing in a stable manner. A front substrate (1) and a back substrate (2) are disposed to face each other, and a discharge space (3) is formed and partitioned by barrier ribs (10) so as to form priming discharge cells (17) and main discharge cells (11). A clearance (19) is provided between the barrier ribs (10) of the priming discharge cells (17) and the front substrate (1), and priming particles generated in the priming discharge cells (17) are supplied to the main discharge cells (11) through the clearance (19), whereby a PDP performing high-speed addressing is obtained.

Abstract: The present invention relates to a semiconductor device comprising a substrate (101); a semiconductor multi-layered structure formed on the substrate (101); the semiconductor multi-layered structure comprising an emitter layer (102), a base layer (105), and a collector layer (107), each composed of a group III-V n-type compound semiconductor and layered in this order; a quantum dot barrier layer (103) disposed between the emitter layer (102) and the base layer (105); a collector electrode (110), a base electrode (111) and an emitter electrode (112) connected to the collector layer (107), the base layer (105) and the emitter layer (102), respectively; the quantum dot barrier layer (103) comprising a plurality of quantum dots (103c); the quantum dots (103) being sandwiched between first and second barrier layers (103a, 103d) from the emitter layer side and the base layer side, respectively; each of the quantum dots (103c) having a convex portion that is convex to the base layer (105); a base layer (105) side in

Abstract: A hetero field effect transistor according to the present invention comprises an InP substrate, a channel layer provided on the InP substrate with a buffer layer disposed between the InP substrate and the channel layer, a spacer layer constituted by a semiconductor having a band gap larger than that of the channel layer formed to hetero-join to the channel layer, and a carrier supply layer formed to be adjacent to the spacer layer, wherein the channel layer comprises a predetermined semiconductor layer constituted by a compound semiconductor represented by a formula GaxIn1?xNyA1?y in which A is As or Sb, composition x satisfies 0?x?0.2, and composition y satisfies 0.03?y?0.10.

Abstract: A hetero field effect transistor according to the present invention comprises an InP substrate, a channel layer provided on the InP substrate with a buffer layer disposed between the InP substrate and the channel layer, a spacer layer constituted by a semiconductor having a band gap larger than that of the channel layer formed to hetero-join to the channel layer, and a carrier supply layer formed to be adjacent to the spacer layer, wherein the channel layer comprises a predetermined semiconductor layer constituted by a compound semiconductor represented by a formula GaxIn1−xNyA1−y in which A is As or Sb, composition x satisfies 0≦x≦0.2, and composition y satisfies 0.03≦y≦0.10.

Abstract: The present invention provides a switching device comprising first to third connection terminals, a first FET provided with a pair of terminals one of which is connected, via a first direct-current blocking capacitive element, to the first connection terminal and the other of which is connected, via another first direct-current blocking capacitive element, to the second connection terminal, and a second FET provided with a pair of terminals one of which is connected, via a second direct-current blocking capacitive element, to the first connection terminal and the other of which is connected, via another second direct-current blocking capacitive element, to the third connection terminal. The channel type of the first FET is the same as the channel type of the second FET. A first bias voltage is applied to a gate of the first FET, and a second bias voltage is applied to both the main terminals of the second FET.

Abstract: A plasma oscillation switching device of the present invention comprises semiconductor substrate 101; first barrier layer 103 that is composed of a III-V compound semiconductor and formed on the substrate; channel layer 104 that is composed of a III-V compound semiconductor and formed on the first barrier layer; second barrier layer 105 that is composed of a III-V compound semiconductor and formed on the channel layer; source electrode 107, gate electrode 109 and drain electrode 108 provided on the second barrier layer, wherein the first barrier layer includes n-type diffusion layer 103a, the second barrier layer includes p-type diffusion layer 105a, the band gap of the channel layer is smaller than the band gaps of the first and the second barrier layers, two-dimensional electron gas EG is accumulated at the conduction band at the boundary between the first barrier layer and the channel layer, two-dimensional hole gas HG is accumulated at the valence band at the boundary between the second barrier layer and

Abstract: In a small transmission line type high-frequency circuit element that has small loss due to conductor resistance and has a high Q value, an error in the dimension of a pattern, etc. can be corrected to adjust element characteristics. An elliptical shape resonator (12) that is formed of an electric conductor is formed on a substrate (11a), while a pair of input-output terminals (13) are formed on a substrate (11b). Substrate (11a) on which resonator (12) is formed and substrate (11b) on which input-output terminal (13) is formed are located parallel to each other, with a surface on which resonator (12) is formed and a surface on which input-output terminal (13) is formed being opposed. Substrates (11a) and (11b) that are located parallel to each other are relatively moved by a mechanical mechanism that uses a screw and moves slightly. Also, substrate (11a) is rotated by the mechanical mechanism that uses a screw and moves slightly around the center axis of resonator (12) as a rotation axis (18).

Abstract: In a small transmission line type high-frequency circuit element that has small loss due to conductor resistance and has a high Q value, an error in the dimension of a pattern, etc. can be corrected to adjust element characteristics. An elliptical shape resonator (12) that is formed of an electric conductor is formed on a substrate (11a), while a pair of input-output terminals (13) are formed on a substrate (11b). Substrate (11a) on which resonator (12) is formed and substrate (11b) on which input-output terminal (13) is formed are located parallel to each other, with a surface on which resonator (12) is formed and a surface on which input-output terminal (13) is formed being opposed. Substrates (11a) and (11b) that are located parallel to each other are relatively moved by a mechanical mechanism that uses a screw and moves slightly. Also, substrate (11a) is rotated by the mechanical mechanism that uses a screw and moves slightly around the center axis of resonator (12) as a rotation axis (18).

Abstract: In a small transmission line type high-frequency circuit element that has small loss due to conductor resistance and has a high Q value, an error in the dimension of a pattern, etc. can be corrected to adjust element characteristics. An elliptical shape resonator (12) that is formed of an electric conductor is formed on a substrate (11a), while a pair of input-output terminals (13) are formed on a substrate (11b). Substrate (11a) on which resonator (12) is formed and substrate (11b) on which input-output terminal (13) is formed are located parallel to each other, with a surface on which resonator (12) is formed and a surface on which input-output terminal (13) is formed being opposed. Substrates (11a) and (11b) that are located parallel to each other are relatively moved by a mechanical mechanism that uses a screw and moves slightly. Also, substrate (11a) is rotated by the mechanical mechanism that uses a screw and moves slightly around the center axis of resonator (12) as a rotation axis (18).

Abstract: A field-effect type superconducting device includes a channel layer. The channel layer includes Bi-based oxide compound containing Cu. A source electrode contacts the channel layer. A drain electrode contacts the channel layer. A gate insulating film made of insulating material extends on on the channel layer. A gate electrode extends on the gate insulating film.