Abstract: An expansion base unit includes an input connector communicatively connectable with a cable to a connector in a previous base unit to allow receipt of a signal from the previous base unit, and a plurality of output connectors that each are communicatively connectable with a cable to a connector of a plurality of connectors in a subsequent expansion base unit to allow transmission of the signal received by the input connector to the subsequent expansion base unit.

Abstract: An expansion base unit (10) includes an input connector (101, 102) communicatively connectable with a cable (C11, C12) to a connector in a previous base unit to allow receipt of a signal from the previous base unit, and a plurality of output connectors (111, 112) that each are communicatively connectable with a cable (C21, C22) to a connector of a plurality of connectors in a subsequent expansion base unit to allow transmission of the signal received by the input connector (101, 102) to the subsequent expansion base unit.

Abstract: A programmable logic controller system has: an input unit system section in which plural input units are combined; a CPU unit system section in which plural CPU units are combined; and an output unit system section in which plural output units are combined. Each system section has: a setting retaining unit to retain a setting indicating whether to use any of the plural units alone or use the plural units in a multiplexed manner; and a comparing unit to make a comparison of processed data between the plural units when the setting indicates using the plural units in a multiplexed manner, to send the processed data if the comparison result indicates consistency, and to perform an error process if the comparison result indicates inconsistency. In the setting retaining unit, whether to use alone or in a multiplexed manner is set based on an externally-input setting instruction.

Abstract: To provide a sequencer system including a plurality of bases. The plurality of bases are configured by a fundamental base and a plurality of stages of extension bases, the fundamental base being installed with a control unit. The control unit is configured to enable transmission of a HOP designation packet toward the bases, number of HOPs being designated for the HOP designation packet. Upon reception of the HOP designation packet with the number of HOPs being other than 0, each of the bases subtracts the number of HOPs by one, and transfers the HOP designation packet to the base connected to a subsequent stage. Upon reception of the HOP designation packet with the number of HOPs being 0, each of the bases determines that the HOP designation packet is a packet directed to the base itself.

Abstract: A programmable logic controller system has: an input unit system section in which plural input units are combined; a CPU unit system section in which plural CPU units are combined; and an output unit system section in which plural output units are combined. Each system section has: a setting retaining unit to retain a setting indicating whether to use any of the plural units alone or use the plural units in a multiplexed manner; and a comparing unit to make a comparison of processed data between the plural units when the setting indicates using the plural units in a multiplexed manner, to send the processed data if the comparison result indicates consistency, and to perform an error process if the comparison result indicates inconsistency. In the setting retaining unit, whether to use alone or in a multiplexed manner is set based on an externally-input setting instruction.

Abstract: To provide a sequencer system including a plurality of bases. The plurality of bases are configured by a fundamental base and a plurality of stages of extension bases, the fundamental base being installed with a control unit. The control unit is configured to enable transmission of a HOP designation packet toward the bases, number of HOPs being designated for the HOP designation packet. Upon reception of the HOP designation packet with the number of HOPs being other than 0, each of the bases subtracts the number of HOPs by one, and transfers the HOP designation packet to the base connected to a subsequent stage. Upon reception of the HOP designation packet with the number of HOPs being 0, each of the bases determines that the HOP designation packet is a packet directed to the base itself.

Abstract: A half-duplex communication control method according to this invention is constructed so that in a half-duplex communication control method in which two devices connected by two signal lines are had and half-duplex communication in one-to-one correspondence is conducted, the first device outputs a sending request output for providing notification of a state of a communication request to the second device as a sending request signal using an open collector buffer and also turns back its sending request output inside the self device to check a communicable state as a sending request input and also in the case of being receivable with respect to the sending request signal sent from the opponent device, the second device outputs a sending permission output for providing notification of a communicable state to the first device as a sending permission signal using an open collector buffer and also turns back its sending permission output inside the self device to check a communicable state as a sending permission i

Abstract: A half-duplex communication control method according to this invention is constructed so that in a half-duplex communication control method in which two devices connected by two signal lines are had and half-duplex communication in one-to-one correspondence is conducted, the first device outputs a sending request output for providing notification of a state of a communication request to the second device as a sending request signal using an open collector buffer and also turns back its sending request output inside the self device to check a communicable state as a sending request input and also in the case of being receivable with respect to the sending request signal sent from the opponent device, the second device outputs a sending permission output for providing notification of a communicable state to the first device as a sending permission signal using an open collector buffer and also turns back its sending permission output inside the self device to check a communicable state as a sending permission i

Abstract: A lower header 10 into which low temperature liquid is flowed and an upper header 16 are connected with each other via a plurality of outer heat exchange tubes 22. A plurality of inner heat exchange tube 24 are respectively provided in the corresponding outer heat exchange tubes 22 at a region of an inflow end portion of each outer heat exchange tube 22. An annular passage 23 is defined between an inside surface of each outer heat exchange tube 22 and an outside surface of each inner heat exchange tube 24 for flowing low temperature liquid. Each annular passage 23 is communicated with the lower header 10.