Patents by Inventor Koichi SHIRAHATA
Koichi SHIRAHATA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11625517Abstract: An information processing method includes executing a first process of performing a non-linear analysis by iterating a linear analysis, and executing a second process of predicting a residual threshold to be used for determination of convergence of the linear analysis by a prediction model, based on a residual transition and calculation time for each iteration of the linear analysis obtained for each residual threshold using a plurality of experimental values by the first process. The information processing method further includes performing passage of data between the first process and the second process through an inter-process communication using a shared memory set in a memory.Type: GrantFiled: July 14, 2020Date of Patent: April 11, 2023Assignee: FUJITSU LIMITEDInventors: Koichi Shirahata, Amir Haderbache, Yasumoto Tomita
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Patent number: 11615106Abstract: A non-transitory computer-readable storage medium storing a program that causes a processor to execute a process. The process includes selecting a section from among a plurality of sections, performing on an input data group the time-series analysis from a top section to the section when each of a plurality of approximation application degrees is set in the section, based on a result of the performing, for each of the plurality of approximation application degrees is set, calculating an error and an index value for a result of the time-series analysis when an approximation calculation is not applied, the index value indicating a degree of speed-up, storing an approximation application degree in which the error falls within a range, and the index value obtained when the error falls within the range, and executing the time-series analysis on an another input data group by applying a combination of the approximation application degrees.Type: GrantFiled: April 13, 2021Date of Patent: March 28, 2023Assignee: FUJITSU LIMITEDInventor: Koichi Shirahata
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Patent number: 11610135Abstract: An information processing method includes: deciding a timing when transfer to a memory is completed in a total time that is a sum of a calculation time at one or plurality of second layers at which calculation is carried out earlier than a first layer regarding a timing when data relating to calculation of the first layer is stored in the memory based on a calculation time estimated in advance regarding each of one layer or a given number of layers in a plurality of layers included in a neural network and a time of transfer of data relating to calculation of each of the one layer or the given number of layers to the memory; and storing the data relating to calculation of the first layer in the memory based on the decided timing in sequentially carrying out calculation of each layer of the neural network.Type: GrantFiled: November 18, 2019Date of Patent: March 21, 2023Assignee: FUJITSU LIMITEDInventor: Koichi Shirahata
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Publication number: 20230011312Abstract: An information processing apparatus stores mesh data including a plurality of nodes and a plurality of edges and boundary condition data indicating force applied to an object represented by the mesh data. The information processing apparatus calculates a stiffness matrix including a plurality of stiffness values corresponding to the plurality of edges and a force vector including a plurality of force values corresponding to the plurality of nodes. The information processing apparatus generates feature data from the stiffness matrix and the force vector. The information processing apparatus infers a plurality of displacement amounts corresponding to the plurality of nodes by performing a convolutional operation on the feature data in accordance with a connection relationship of the plurality of nodes.Type: ApplicationFiled: April 11, 2022Publication date: January 12, 2023Applicant: FUJITSU LIMITEDInventors: AMIR HADERBACHE, Koichi SHIRAHATA
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Publication number: 20220414461Abstract: A non-transitory computer-readable recording medium stores therein an inference program that causes a computer to execute a process including inferring, by inputting new input data to an approximate model that is obtained by conducting practice by using training data in which a relationship between input data and output data of a numerical simulation is defined, output data that is associated with the new input data, determining whether or not accuracy of an inference result obtained from the approximate model satisfies a condition, correcting the inference result when the accuracy of the inference result obtained from the approximate model does not satisfy the condition, and outputting the corrected inference result.Type: ApplicationFiled: March 17, 2022Publication date: December 29, 2022Applicant: FUJITSU LIMITEDInventor: Koichi SHIRAHATA
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Patent number: 11513851Abstract: A scheduler includes circuitry configured to, based on similarity between execution time and power consumption information of jobs executed in a system, classifies jobs into groups, construct respective time series prediction models for the groups using a power waveform included in each of the groups as teacher data, predict a power waveform at an interval including a first time from each of the constructed time series prediction models, compare a power waveform at an interval including a first time of a job in execution for which power is to be predicted with the predicted power waveform of each of the groups to identify a similar time series prediction model, based on the identified time series prediction model, predict power consumption at a predetermined interval including a second time for the job for which power is to be predicted, and control job execution based on the predicted power consumption.Type: GrantFiled: March 4, 2020Date of Patent: November 29, 2022Assignee: FUJITSU LIMITEDInventors: Takashi Shiraishi, Shigeto Suzuki, Koichi Shirahata
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Patent number: 11475284Abstract: An information processing apparatus includes a processor including a first operation circuit that executes a product-sum operation, a second operation circuit that executes a certain operation, and a resister. The processor executes a first operation including the certain operation in a first layer in a neural network. The processor executes the first operation by a second method of calculating the certain operation by the second operation circuit, in a case where second operation time necessary for the first operation when the certain operation is executed by the second operation circuit is less than memory transfer time. Or the processor executes the first operation by a first method of calculating the certain operation by an approximate calculation by the first operation circuit, in a case where first operation time necessary for the first operation when executed by the first method is less than the memory transfer time.Type: GrantFiled: December 11, 2019Date of Patent: October 18, 2022Assignee: FUJITSU LIMITEDInventors: Koichi Shirahata, Takashi Arakawa, Katsuhiro Yoda, Makiko Ito, Yasumoto Tomita
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Publication number: 20220318591Abstract: A memory stores a first trained model for determining features of mesh data, which includes a plurality of nodes and a plurality of edges connecting them, by removing some of the edges from the mesh data. A processor generates, from second mesh data, first mesh data having a smaller number of edges than the second mesh data by use of the first trained model. The processor generates, by running a simulation using the first mesh data, first simulation result data that indicates a physical quantity of an object represented by the first mesh data. The processor infers, from the first mesh data and the first simulation result data and by use of a second trained model, second simulation result data that would be obtained by running the simulation using the second mesh data.Type: ApplicationFiled: December 14, 2021Publication date: October 6, 2022Applicant: FUJITSU LIMITEDInventors: AMIR HADERBACHE, Koichi SHIRAHATA
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Publication number: 20220277222Abstract: A non-transitory computer-readable storage medium storing a machine learning program that causes at least one computer to execute a process, the process includes, training a machine learning model by using a backpropagation process; skipping reading a first mini-batch in a first epoch among a plurality of mini-batches that are created by dividing training data.Type: ApplicationFiled: November 9, 2021Publication date: September 1, 2022Applicant: FUJITSU LIMITEDInventors: Koichi SHIRAHATA, Masahiro Miwa
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Patent number: 11392475Abstract: A non-transitory computer-readable recording medium has stored therein a program that causes a computer to execute a process including: dividing a time from a start to an end of execution of a first job into a plurality of time periods, the time being represented in first power consumption information; calculating a cycle of a time-series variation of power consumption within each time period; generating, for each of the plurality of time periods, a prediction model for predicting power consumption of a predetermined future time; acquiring second power consumption information that is an actual measurement value of power consumption according to an elapsed time from a start of execution of a second job that is being executed; and predicting future power consumption of the second job, using the prediction model generated for a time period including the elapsed time from the start of execution of the second job to a present.Type: GrantFiled: January 24, 2020Date of Patent: July 19, 2022Assignee: FUJITSU LIMITEDInventors: Shigeto Suzuki, Michiko Shiraga, Koichi Shirahata, Hiroshi Endo, Hiroyuki Fukuda, Takuji Yamamoto
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Publication number: 20220067246Abstract: A processor acquires mesh data representing a shape of an object with a plurality of nodes and result data representing a physical amount of the object, the physical amount having been calculated based on the mesh data. The processor calculates a first feature amount representing a feature of a positional relationship of the plurality of nodes by performing a topological data analysis on the plurality of nodes included in the mesh data. The processor predicts a physical amount calculated from the shape of the object represented with more nodes than the nodes of the mesh data by entering the first feature amount and a second feature amount based on the physical amount represented by the result data to a learned model.Type: ApplicationFiled: May 21, 2021Publication date: March 3, 2022Applicant: FUJITSU LIMITEDInventors: AMIR HADERBACHE, Koichi SHIRAHATA
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Publication number: 20210382891Abstract: A non-transitory computer-readable storage medium storing a program that causes a processor to execute a process. The process includes selecting a section from among a plurality of sections, performing on an input data group the time-series analysis from a top section to the section when each of a plurality of approximation application degrees is set in the section, based on a result of the performing, for each of the plurality of approximation application degrees is set, calculating an error and an index value for a result of the time-series analysis when an approximation calculation is not applied, the index value indicating a degree of speed-up, storing an approximation application degree in which the error falls within a range, and the index value obtained when the error falls within the range, and executing the time-series analysis on an another input data group by applying a combination of the approximation application degrees.Type: ApplicationFiled: April 13, 2021Publication date: December 9, 2021Applicant: FUJITSU LIMITEDInventor: Koichi SHIRAHATA
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Patent number: 11080812Abstract: An image recognition apparatus includes a processor including a plurality of arithmetic units; and a memory storing a plurality of data elements, each corresponding to one of candidate regions detected in an image and indicating a location and an evaluation value of the corresponding candidate region. The processor sorts the data elements by calculating in parallel, in reference to evaluation values, indexes each indicating a position of a corresponding one of the data elements in a sorted ordering and transferring in parallel, after the calculation of the indexes, the data elements based on the indexes. The processor selects part of the candidate regions based on the sorted ordering of the data elements.Type: GrantFiled: August 19, 2019Date of Patent: August 3, 2021Assignee: FUJITSU LIMITEDInventors: Takuya Fukagai, Kyosuke Maeda, Koichi Shirahata, Yasumoto Tomita
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Patent number: 11003990Abstract: An information processing device includes: a processor that executes a process, the process including: controlling a recognition process that performs, with respect to input neuron data, a hierarchical neural network operation including a weighting operation using a parameter and that holds the neuron data and the parameter of each layer of the neural network in each of memory areas; and performing, in a learning process of learning the parameter of each layer of the neural network from an error that is obtained from a recognition result, regarding the layer in which the neuron data and the parameter are held in the memory areas, control of calculating an error of the neuron data after calculating an error of the parameter.Type: GrantFiled: October 2, 2017Date of Patent: May 11, 2021Assignee: FUJITSU LIMITEDInventor: Koichi Shirahata
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Publication number: 20210027004Abstract: An information processing method includes executing a first process of performing a non-linear analysis by iterating a linear analysis, and executing a second process of predicting a residual threshold to be used for determination of convergence of the linear analysis by a prediction model, based on a residual transition and calculation time for each iteration of the linear analysis obtained for each residual threshold using a plurality of experimental values by the first process. The information processing method further includes performing passage of data between the first process and the second process through an inter-process communication using a shared memory set in a memory.Type: ApplicationFiled: July 14, 2020Publication date: January 28, 2021Applicant: FUJITSU LIMITEDInventors: Koichi SHIRAHATA, AMIR HADERBACHE, YASUMOTO TOMITA
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Publication number: 20200310874Abstract: A scheduler includes circuitry configured to, based on similarity between execution time and power consumption information of jobs executed in a system, classifies jobs into groups, construct respective time series prediction models for the groups using a power waveform included in each of the groups as teacher data, predict a power waveform at an interval including a first time from each of the constructed time series prediction models, compare a power waveform at an interval including a first time of a job in execution for which power is to be predicted with the predicted power waveform of each of the groups to identify a similar time series prediction model, based on the identified time series prediction model, predict power consumption at a predetermined interval including a second time for the job for which power is to be predicted, and control job execution based on the predicted power consumption.Type: ApplicationFiled: March 4, 2020Publication date: October 1, 2020Applicant: FUJITSU LIMITEDInventors: Takashi Shiraishi, Shigeto SUZUKI, Koichi SHIRAHATA
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Publication number: 20200257605Abstract: A non-transitory computer-readable recording medium has stored therein a program that causes a computer to execute a process including: dividing a time from a start to an end of execution of a first job into a plurality of time periods, the time being represented in first power consumption information; calculating a cycle of a time-series variation of power consumption within each time period; generating, for each of the plurality of time periods, a prediction model for predicting power consumption of a predetermined future time; acquiring second power consumption information that is an actual measurement value of power consumption according to an elapsed time from a start of execution of a second job that is being executed; and predicting future power consumption of the second job, using the prediction model generated for a time period including the elapsed time from the start of execution of the second job to a present.Type: ApplicationFiled: January 24, 2020Publication date: August 13, 2020Applicant: FUJITSU LIMITEDInventors: Shigeto SUZUKI, Michiko SHIRAGA, Koichi SHIRAHATA, Hiroshi ENDO, Hiroyuki FUKUDA, Takuji YAMAMOTO
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Publication number: 20200202222Abstract: An information processing method includes: deciding a timing when transfer to a memory is completed in a total time that is a sum of a calculation time at one or plurality of second layers at which calculation is carried out earlier than a first layer regarding a timing when data relating to calculation of the first layer is stored in the memory based on a calculation time estimated in advance regarding each of one layer or a given number of layers in a plurality of layers included in a neural network and a time of transfer of data relating to calculation of each of the one layer or the given number of layers to the memory; and storing the data relating to calculation of the first layer in the memory based on the decided timing in sequentially carrying out calculation of each layer of the neural network.Type: ApplicationFiled: November 18, 2019Publication date: June 25, 2020Applicant: FUJITSU LIMITEDInventor: Koichi SHIRAHATA
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Publication number: 20200202201Abstract: An information processing apparatus includes a processor including a first operation circuit that executes a product-sum operation, a second operation circuit that executes a certain operation, and a resister. The processor executes a first operation including the certain operation in a first layer in a neural network. The processor executes the first operation by a second method of calculating the certain operation by the second operation circuit, in a case where second operation time necessary for the first operation when the certain operation is executed by the second operation circuit is less than memory transfer time. Or the processor executes the first operation by a first method of calculating the certain operation by an approximate calculation by the first operation circuit, in a case where first operation time necessary for the first operation when executed by the first method is less than the memory transfer time.Type: ApplicationFiled: December 11, 2019Publication date: June 25, 2020Applicant: FUJITSU LIMITEDInventors: Koichi SHIRAHATA, Takashi Arakawa, Katsuhiro Yoda, MAKIKO ITO, YASUMOTO TOMITA
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Publication number: 20200074690Abstract: An image recognition apparatus includes a processor including a plurality of arithmetic units; and a memory storing a plurality of data elements, each corresponding to one of candidate regions detected in an image and indicating a location and an evaluation value of the corresponding candidate region. The processor sorts the data elements by calculating in parallel, in reference to evaluation values, indexes each indicating a position of a corresponding one of the data elements in a sorted ordering and transferring in parallel, after the calculation of the indexes, the data elements based on the indexes. The processor selects part of the candidate regions based on the sorted ordering of the data elements.Type: ApplicationFiled: August 19, 2019Publication date: March 5, 2020Applicant: FUJITSU LIMITEDInventors: Takuya Fukagai, Kyosuke MAEDA, Koichi SHIRAHATA, YASUMOTO TOMITA