Patents by Inventor Koichi Suda
Koichi Suda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7746614Abstract: A drive circuit that controls a switching device ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device when short circuit of the switching device is detected. Additionally, an ON-pulse retention command circuit retains the output of the drive circuit ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator that detects the gate terminal voltage of the switching device.Type: GrantFiled: January 23, 2009Date of Patent: June 29, 2010Assignee: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
-
Patent number: 7696650Abstract: A level shifting circuit, satisfying a requirement of a high tolerated dV/dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of a switching terminal, are obtained differentially and integrated, and, in case these pulse signals equal or exceed stipulated integrated values, are transmitted as regular control signals controlling the on/off state.Type: GrantFiled: September 4, 2008Date of Patent: April 13, 2010Assignee: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda, Katsunori Suzuki
-
Patent number: 7675727Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.Type: GrantFiled: November 9, 2007Date of Patent: March 9, 2010Assignee: Hitachi, Ltd.Inventors: Masataka Sasaki, Katsumi Ishikawa, Ryuichi Saito, Koichi Suda, Katsuaki Takahashi
-
Patent number: 7564294Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.Type: GrantFiled: December 21, 2007Date of Patent: July 21, 2009Assignee: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda
-
Publication number: 20090128974Abstract: A drive circuit that controls a switching device ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device when short circuit of the switching device is detected. Additionally, an ON-pulse retention command circuit retains the output of the drive circuit ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator that detects the gate terminal voltage of the switching device.Type: ApplicationFiled: January 23, 2009Publication date: May 21, 2009Applicant: HITACHI, LTD.Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
-
Patent number: 7483250Abstract: A drive circuit that controls a switching device ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device when short circuit of the switching device is detected. Additionally, an ON-pulse retention command circuit retains the output of the drive circuit ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator that detects the gate terminal voltage of the switching device.Type: GrantFiled: October 12, 2006Date of Patent: January 27, 2009Assignee: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
-
Publication number: 20080315938Abstract: A level shifting circuit, satisfying a requirement of a high tolerated dV/dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of a switching terminal, are obtained differentially and integrated, and, in case these pulse signals equal or exceed stipulated integrated values, are transmitted as regular control signals controlling the on/off state.Type: ApplicationFiled: September 4, 2008Publication date: December 25, 2008Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda, Katsunori Suzuki
-
Publication number: 20080173216Abstract: The present invention is intended to provide a process for forming an electrodeposition coating film, wherein generation of gas pinhole is reduced and coating film appearance is excellent without using a specific resin as a binder resin. The present invention relates a process for forming an electrodeposition coating film having reduction of generation of gas pinhole, comprising a step of electrocoating by immersing an article to be coated in a cationic electrodeposition coating composition, wherein, the cationic electrodeposition coating composition comprises 10 to 30 parts by weight of a pigment comprising zinc oxide based on 100 parts by weight of a solid content of the coating composition, and the content of zinc oxide contained in the pigment is 0.25 to 5 parts by weight based on 100 parts by weight of the pigment.Type: ApplicationFiled: January 16, 2008Publication date: July 24, 2008Inventors: Keisuke Tsutsui, Kenichi Yoshizawa, Koichi Suda, Koji Izumiya
-
Publication number: 20080106320Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.Type: ApplicationFiled: December 21, 2007Publication date: May 8, 2008Applicant: Hitachi, Ltd.Inventors: Katsumi ISHIKAWA, Hideki MIYAZAKI, Koichi SUDA
-
Publication number: 20080074819Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.Type: ApplicationFiled: November 9, 2007Publication date: March 27, 2008Applicant: HITACHI, LTD.Inventors: Masataka Sasaki, Katsumi Ishikawa, Ryuichi Saito, Koichi Suda, Katsuaki Takahashi
-
Patent number: 7336118Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.Type: GrantFiled: July 28, 2005Date of Patent: February 26, 2008Assignee: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda
-
Patent number: 7295412Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.Type: GrantFiled: February 9, 2004Date of Patent: November 13, 2007Assignee: Hitachi, Ltd.Inventors: Masataka Sasaki, Katsumi Ishikawa, Ryuichi Saito, Koichi Suda, Katsuaki Takahashi
-
Publication number: 20070030615Abstract: A drive circuit that controls a switching device ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device when short circuit of the switching device is detected. Additionally, an ON-pulse retention command circuit retains the output of the drive circuit ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator that detects the gate terminal voltage of the switching device.Type: ApplicationFiled: October 12, 2006Publication date: February 8, 2007Applicant: Hitachi, LTD.Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
-
Publication number: 20070001742Abstract: A level shifting circuit, satisfying a requirement of a high tolerated dV/dt level, and a highly reliable inverter circuit, wherein a set pulse signal and a reset pulse signal, both of which are level-shifted to a potential side taking as reference a reference potential of a gate control terminal of a switching terminal, are obtained differentially and integrated, and, in case these pulse signals equal or exceed stipulated integrated values, are transmitted as regular control signals controlling the on/off state.Type: ApplicationFiled: June 30, 2005Publication date: January 4, 2007Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda, Katsunori Suzuki
-
Publication number: 20060246251Abstract: An optical recording medium includes a substrate 11 with a concave and convex shape for dividing a track area formed on its surface, an optical recording layer 12 having a compound consisting of at least tin (Sn), nitrogen (N) and oxygen (O) formed on the surface in which the concave and convex shape is formed and a light transmission layer 13 formed on this optical recording layer 12. Then, a compound composition SnxNyOz of tin (Sn) nitrogen (N) and oxygen (O) comprising the optical recording layer 12 is selected so as to satisfy 30<x<70 (atomic %), 1<y<20 (atomic %) and 20<z<60 (atomic %). According to this arrangement, the optical recording medium can improve jitter caused when Sn is used as a recording material.Type: ApplicationFiled: July 4, 2003Publication date: November 2, 2006Inventor: Koichi Suda
-
Patent number: 7126802Abstract: A drive circuit 21 that controls a switching device 23 ON/OFF and a soft cutoff command circuit that gradually decreases the gate terminal voltage of the switching device 23 when short circuit of the switching device 23 is detected. Additionally, an ON-pulse retention command circuit 11 retains the output of the drive circuit 21 ON when the gate terminal voltage is judged to have exceeded a specified value by a gate voltage judgment comparator 16 that detects the gate terminal voltage of the switching device 23.Type: GrantFiled: February 24, 2004Date of Patent: October 24, 2006Assignee: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda
-
Publication number: 20060033552Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.Type: ApplicationFiled: July 28, 2005Publication date: February 16, 2006Applicant: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Hideki Miyazaki, Koichi Suda
-
Patent number: 6881313Abstract: The present invention provides a novel crater inhibiting method and crater inhibiting agent not containing an acrylic resin and hence capable of increasing the opportunities to be added to coating compositions and improving degree of freedom in preparation methods of coating composition. The method comprises that electrodeposition coating is conducted by using an electrodeposition coating composition containing an aminopolyether modified epoxy having a polyether chain of specific structure as an additive.Type: GrantFiled: March 29, 2002Date of Patent: April 19, 2005Assignee: Nippon Paint Co., Ltd.Inventors: Shuhei Yamoto, Koichi Suda, Kunio Murase
-
Publication number: 20040252432Abstract: A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.Type: ApplicationFiled: February 9, 2004Publication date: December 16, 2004Applicant: HITACHI, LTD.Inventors: Masataka Sasaki, Katsumi Ishikawa, Ryuichi Saito, Koichi Suda, Katsuaki Takahashi
-
Publication number: 20040252435Abstract: (Object) To offer such drive circuit for a switching device that can operate a soft cutoff function when short circuit is detected and also can be prevented from breakdown even if a narrow pulse is inputted.Type: ApplicationFiled: February 24, 2004Publication date: December 16, 2004Applicant: Hitachi, Ltd.Inventors: Katsumi Ishikawa, Masataka Sasaki, Koichi Suda