Abstract: An endoscope system comprises an electric scope and a processor. The electric scope has a signal emitting unit that radiates a digitized optical signal and an optical cable that transmits the digitized optical signal from the signal emitting unit. The processor has a first signal receiving unit that receives the digitized optical signal from the signal emitting unit through the optical cable and a control-signal emitting unit that radiates a control signal that is converted to an optical signal. The electric scope has a control-signal receiving unit that receives a radiated light of the control signal that is radiated from the processor, through the optical cable. The signal emitting unit has an emitting surface that is parallel to a receiving surface of the control-signal receiving unit.

Abstract: An endoscope comprises an electric scope and a processor. The electric scope has a CMOS sensor and a video-signal emitting unit that outputs an image signal that is imaged by the CMOS sensor and that is converted to a light signal. The processor has a video-signal photo sensor unit that receives light regarding the image signal that is output from the video-signal emitting unit, and performs an image processing operation based on the light regarding the image signal.

Abstract: A timing generator capable of improving design efficiency by facilitating adaptation to change in design. The timing generator has work area 9 which outputs parameters in response to control data, and main core 12 to which the parameters are inputted. In the work area, V and H parameters are described. The main core consists of third comparator 11 for comparing a count value of V counter 10 with V parameter and outputting a first control pulse, first comparator 1 for comparing a count value of H counter 3 with H parameter and outputting a second control pulse, second comparator 4 for comparing a count value of high speed counter 8 with H parameter and outputting a third control pulse, first selector 2 for selecting the second control data or the third control data, and first JK flip flop 5 for generating a timing signal from output of the first selector.

Abstract: A timing generator capable of improving design efficiency by facilitating adaptation to change in design. The timing generator has work area 9 which outputs parameters in response to control data, and main core 12 to which the parameters are inputted. In the work area, V and H parameters are described. The main core consists of third comparator 11 for comparing a count value of V counter 10 with V parameter and outputting a first control pulse, first comparator 1 for comparing a count value of H counter 3 with H parameter and outputting a second control pulse, second comparator 4 for comparing a count value of high speed counter 8 with H parameter and outputting a third control pulse, first selector 2 for selecting the second control data or the third control data, and first JK flip flop 5 for generating a timing signal from output of the first selector.