Abstract: While transmission of data to be transmitted and gap data to be transmitted by the same transmission path as that data is controlled so that a frequency of a data signal may become equal to or more than a certain frequency, a data output driver selects and outputs the data or the gap data as the data signal, a valid signal generation circuit outputs a valid signal that indicates whether or not the data is effective, and a reception circuit that is formed in a different die receives the data signal and the valid signal transmitted via the transmission path that includes a through silicon via and acquires the data from the data signal based on the valid signal.

Abstract: While transmission of data to be transmitted and gap data to be transmitted by the same transmission path as that data is controlled so that a frequency of a data signal may become equal to or more than a certain frequency, a data output driver selects and outputs the data or the gap data as the data signal, a valid signal generation circuit outputs a valid signal that indicates whether or not the data is effective, and a reception circuit that is formed in a different die receives the data signal and the valid signal transmitted via the transmission path that includes a through silicon via and acquires the data from the data signal based on the valid signal.

Abstract: An arithmetic processing apparatus includes an operation circuit group that performs encryption and a redundant operation circuit group configured the same as the operation circuit group. The arithmetic processing apparatus, while performing encryption, performs normal encryption in the operation circuit group, and performs an encryption mask processing program by using data and the like randomly generated by a random data generating unit and the like in the redundant operation circuit group. The arithmetic processing apparatus, when not performing encryption, performs normal arithmetic processing in the redundant operation circuit group.

Abstract: A static random access memory system used within a microprocessor includes a static random access memory array including a plurality of static random access memories, a storage unit configured to store a context ID used in the execution of a program or a process in association with an access pattern of the plurality of static random access memories in the execution of the program or the process, a search unit configured to, every time context switching occurs, search the storage unit for an access pattern that is associated with a context ID corresponding to a context ID of a program or a process to be executed after the context switching; and a power control unit configured to cause a static random access memory to be readable and writable on the basis of the access pattern of the plurality of static random access memories found by the search unit.

Abstract: An arithmetic processing apparatus includes an operation circuit group that performs encryption and a redundant operation circuit group configured the same as the operation circuit group. The arithmetic processing apparatus, while performing encryption, performs normal encryption in the operation circuit group, and performs an encryption mask processing program by using data and the like randomly generated by a random data generating unit and the like in the redundant operation circuit group. The arithmetic processing apparatus, when not performing encryption, performs normal arithmetic processing in the redundant operation circuit group.

Abstract: A static random access memory system used within a microprocessor includes a static random access memory array including a plurality of static random access memories, a storage unit configured to store a context ID used in the execution of a program or a process in association with an access pattern of the plurality of static random access memories in the execution of the program or the process, a search unit configured to, every time context switching occurs, search the storage unit for an access pattern that is associated with a context ID corresponding to a context ID of a program or a process to be executed after the context switching; and a power control unit configured to cause a static random access memory to be readable and writable on the basis of the access pattern of the plurality of static random access memories found by the search unit.

Abstract: The present invention is intended to reduce unnecessary power consumption by controlling disconnection of entries unused in a translation lookaside buffer (TLB) for a long time. In an aspect of the present invention, there is provided a method of controlling electric power consumed for a translation lookaside buffer (TLB) within a central processing device having the TLB and an entry replacement mechanism wherein the TLB includes a plurality of entries and performs translation from a logical address to a physical address and the entry replacement mechanism replaces the entries of the TLB, the method including the steps of: selecting one or more entries among the plurality of entries of the TLB in accordance with one or more predefined criteria based on an output from the entry replacement mechanism, and controlling electric power supplied to the selected entries.

Abstract: A branch prediction method including determining branch prediction data indicating a state of branch prediction according to whether a branch is actually made, performing branch prediction according to the branch prediction data, and correcting the branch prediction data according to whether the branch is actually made.

Abstract: The present invention is intended to reduce unnecessary power consumption by controlling disconnection of entries unused in a translation lookaside buffer (TLB) for a long time. In an aspect of the present invention, there is provided a method of controlling electric power consumed for a translation lookaside buffer (TLB) within a central processing device having the TLB and an entry replacement mechanism wherein the TLB includes a plurality of entries and performs translation from a logical address to a physical address and the entry replacement mechanism replaces the entries of the TLB, the method including the steps of: selecting one or more entries among the plurality of entries of the TLB in accordance with one or more predefined criteria based on an output from the entry replacement mechanism, and controlling electric power supplied to the selected entries.

Abstract: A branch prediction method includes the steps of: a) determining branch prediction data indicating a state of branch prediction according to whether a branch is actually made or not; b) performing branch prediction according to the branch prediction data; and c) correcting the branch prediction data according to whether a branch is actually made or not.