Patents by Inventor Koichiro Inazawa
Koichiro Inazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8840753Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.Type: GrantFiled: October 13, 2009Date of Patent: September 23, 2014Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
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Patent number: 8048325Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.Type: GrantFiled: January 7, 2008Date of Patent: November 1, 2011Assignee: Tokyo Electron LimitedInventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Rie Inazawa, Rich Wise, Arpan Mahorawala, Siddhartha Panda
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Patent number: 7700494Abstract: A method is provided for low-pressure plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: GrantFiled: December 30, 2004Date of Patent: April 20, 2010Assignee: Tokyo Electron Limited, Inc.Inventors: Vaidyanathan Balasubramaniam, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa, legal representative
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Publication number: 20100024983Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.Type: ApplicationFiled: October 13, 2009Publication date: February 4, 2010Applicants: TOKYO ELECTRON LIMITED, KABUSHIKI KAISHA TOSHIBAInventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
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Patent number: 7625494Abstract: The present invention is a plasma etching method including: an arranging step of arranging a pair of electrodes oppositely in a chamber and making one of the electrodes support a substrate to be processed in such a manner that the substrate is arranged between the electrodes, the substrate having an organic-material film and an inorganic-material film; and an etching step of applying a high-frequency electric power to at least one of the electrodes to form a high-frequency electric field between the pair of the electrodes, supplying a process gas into the chamber to form a plasma of the process gas by means of the electric field, and selectively plasma-etching the organic-material film of the substrate with respect to the inorganic-material film by means of the plasma; wherein a frequency of the high-frequency electric power applied to the at least one of the electrodes is 50 to 150 MHz in the etching step.Type: GrantFiled: June 4, 2004Date of Patent: December 1, 2009Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Masanobu Honda, Kazuya Nagaseki, Koichiro Inazawa, Shoichiro Matsuyama, Hisataka Hayashi
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Patent number: 7582220Abstract: In an etching method for etching an etching target film formed on a substrate placed inside an airtight processing chamber 104 by inducing a processing gas into the processing chamber 104, the processing gas contains CF4, N2 and Ar and the etching target film is constituted of an upper organic polysiloxane film and a lower inorganic SiO2 film. The flow rate ratio of CF4 and N2 in the processing gas is essentially set within a range of 1?(N2 flow rate/CF4 flow rate)?4. If (N2 flow rate/CF4 flow rate) is less than 1, an etching stop occurs and, as a result, deep etching is not achieved. If, on the other hand, (N2 flow rate/CF4 flow rate) is larger than 4, bowing tends to occur and, thus, a good etching shape is not achieved. Accordingly, the flow rate ratio of CF4 and N2 in the processing gas should be set essentially within a range of 1?(N2 flow rate/CF4 flow rate)?4, to ensure that improvements in both the selection ratio and the etching shape are achieved.Type: GrantFiled: October 26, 2000Date of Patent: September 1, 2009Assignee: Tokyo Electron LimitedInventors: Mitsuru Ishikawa, Masaaki Hagihara, Koichiro Inazawa
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Patent number: 7517468Abstract: The present invention is a method of etching a lower layer film (64) of an organic material formed on a surface layer (61) of a substrate, using an upper layer film (63) of an Si-containing organic material as a mask. A mixed gas containing an NH3 gas and an O2 gas is supplied into the processing vessel as an etching gas, so as to perform etching by a plasma of the etching gas. When the etching gas is supplied into the processing vessel, a CD shift value of etching can be controlled by adjusting a flow ratio of O2 gas to the NH3 gas. Specifically, a satisfactory CD shift value can be obtained when the flow ratio is from 0.5 to 20%, and preferably, 5 to 10%.Type: GrantFiled: August 5, 2003Date of Patent: April 14, 2009Assignee: Tokyo Electron LimitedInventors: Shuhei Ogawa, Rie Inazawa, legal representative, Koichiro Inazawa
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Publication number: 20080128388Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.Type: ApplicationFiled: January 7, 2008Publication date: June 5, 2008Applicant: TOKYO ELECTRON LIMITEDInventors: Vaidyanathan BALASUBRAMANIAM, Koichiro INAZAWA, Rie INAZAWA, Rich WISE, Arpan P. MAHOROWALA, Siddhartha PANDA
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Patent number: 7344993Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving a hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluorocarbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: GrantFiled: January 11, 2005Date of Patent: March 18, 2008Assignee: Tokyo Electron Limited, Inc.Inventors: Vaidyanathan Balasubramaniam, Yasunori Hatamura, Masaaki Hagihara, Eiichi Nishimura, Rie Inazawa, legal representative, Koichiro Inazawa
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Patent number: 7344991Abstract: A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising ammonia (NH3), and a passivation gas; forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute NH3 and a hydrocarbon gas such as at least one of C2H4, CH4, C2H2, C2H6, C3H4, C3H6, C3H8, C4H6, C4H8, C4H10, C5H8, C5H10, C6H6, C6H10, and C6H12. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising ammonia (NH3), and a passivation gas.Type: GrantFiled: August 14, 2003Date of Patent: March 18, 2008Assignee: Tokyo Electron LimitedInventors: Vaidyanathan Balasubramaniam, Koichiro Inazawa, Rich Wise, Arpan Mahorowala, Siddhartha Panda
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Patent number: 7326650Abstract: In an etching method for achieving a dual damascene structure by using at least one layer of a low-k film and at least one layer of a hard mask, a dummy film, which is ultimately not left in the dual damascene structure, is formed in at least one layer over the hard mask in order to prevent shoulder sag. By adopting this method, a dual damascene structure in which the extent of the shoulder sag at the hard mask is minimized can be achieved through etching.Type: GrantFiled: October 1, 2001Date of Patent: February 5, 2008Assignee: Tokyo Electron LimitedInventors: Yoshihide Kihara, Shin Okamoto, Koichiro Inazawa, Tomoki Suemasa
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Patent number: 7285498Abstract: An etching method etches an organic film by using an inorganic film as a mask at a high etch rate, in a satisfactory etch profile in a satisfactory in-plane uniformity without causing the inorganic film to peel off. An organic film formed on a workpiece is etched by using an inorganic film as a mask with a plasma produced by discharging an etching gas in a processing vessel (1). The etching method uses a mixed gas containing NH3 gas and O2 gas for etching the organic film when the organic film is to be etched in a pattern having an opening ratio of 40% or above. The etching method uses NH3 gas as an etching gas for etching the organic film when the organic film is to be etched in a pattern having an opening ratio below 40%.Type: GrantFiled: October 4, 2004Date of Patent: October 23, 2007Assignees: Tokyo Electron Limited, Kabushiki Kaisha ToshibaInventors: Kazuto Ogawa, Rie Inazawa, legal representative, Hisataka Hayashi, Tokuhisa Ohiwa, Koichiro Inazawa, deceased
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Patent number: 7211197Abstract: A processing gas constituted of CH2F2, O2 and Ar is introduced into a processing chamber 102 of a plasma processing apparatus 100. The flow rate ratio of the constituents of the processing gas is set at CH2F2/O2/Ar=20 sccm/10 sccm/100 sccm. The pressure inside the processing chamber 102 is set at 50 mTorr. 500 W high frequency power with its frequency set at 13.56 MHz is applied to a lower electrode. 108 on which a wafer W is placed. The processing gas is raised to plasma and thus, an SiNx layer 206 formed on a Cu layer 204 is etched. The exposed Cu layer 204 is hardly oxidized and C and F are not injected into it.Type: GrantFiled: August 2, 2004Date of Patent: May 1, 2007Assignee: Tokyo Electron LimitedInventors: Masaaki Hagihara, Koichiro Inazawa, Wakako Naito
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Patent number: 7163887Abstract: A method for fabricating a semiconductor device that prevents the occurrence of bowing and thickness reduction in a dual damascene method. As shown in FIG. 2(B), silicon nitride etching is performed on a semiconductor device in process of fabrication which has a section shown in FIG. 2(A). As a result, part of a copper film is oxidized and changes into oxide. Moreover, a CFx deposit is formed on it. By performing organic insulating film etching by the use of hydrogen plasma in FIG. 2(C), however, the oxide is deoxidized to copper and the CFx deposit is converted into a volatile compound and is removed.Type: GrantFiled: August 25, 2004Date of Patent: January 16, 2007Assignees: Fujitsu Limited, Tokyo Electron LimitedInventors: Hiroshi Kudo, Koichiro Inazawa
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Patent number: 7125806Abstract: An etching method comprises a step of forming a via hole structure based on a photoresist film layer (210) for forming a wiring pattern, a silicon oxide film layer (201) which is a hard mask layer formed under the photoresist film, and an organic Low-k film layer (203) formed under the hard mask layer, wherein in the step, the organic film layer and the organic Low-k film layer are etched by using a mixture gas of N2 gas, H2 gas, and a CF gas.Type: GrantFiled: September 6, 2002Date of Patent: October 24, 2006Assignee: Tokyo Electron LimitedInventors: Akitoshi Harada, Koichiro Inazawa
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Patent number: 7119011Abstract: This semiconductor device includes a substrate 60 to be processed, a first insulation film 64 arranged at a designated position on the substrate 60 to have a via-hole 71a, an organic film 65 formed on the first insulation film 64 and a second insulation film 66 formed on the organic film 65. Both of the organic film 65 and the second insulation film 66 have a trench 71b in communication with the via-hole 71a, in common. Additionally, a manufacturing method of this semiconductor device includes the processes of forming the organic film 65 on the substrate 60 to be processed, forming a film having a designated pattern on the organic film 65 while exposing a part of the organic film 65, and removing the exposed part of the organic film 65 from the substrate 60 to expose a foundation layer of the organic film 65.Type: GrantFiled: May 14, 2004Date of Patent: October 10, 2006Assignee: Tokyo Electron LimitedInventors: Akitoshi Harada, Shin Okamoto, Koichiro Inazawa
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Publication number: 20060154486Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving a hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluorocarbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: ApplicationFiled: January 11, 2005Publication date: July 13, 2006Applicant: TOKYO ELECTRON LIMITEDInventors: Vaidyanathan Balasubramaniam, Yasunori Hatamura, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa
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Publication number: 20060144817Abstract: A method is provided for low-pressure plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. A chamber pressure less than 20 mTorr is utilized in the second cleaning step. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.Type: ApplicationFiled: December 30, 2004Publication date: July 6, 2006Applicant: TOKYO ELECTRON LIMITEDInventors: Vaidyanathan Balasubramaniam, Masaaki Hagihara, Eiichi Nishimura, Koichiro Inazawa, Rie Inazawa
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Publication number: 20060118517Abstract: The present invention is a method of etching a lower layer film (64) of an organic material formed on a surface layer (61) of a substrate, using an upper layer film (63) of an Si-containing organic material as a mask. A mixed gas containing an NH3 gas and an O2 gas is supplied into the processing vessel as an etching gas, so as to perform etching by a plasma of the etching gas. When the etching gas is supplied into the processing vessel, a CD shift value of etching can be controlled by adjusting a flow ratio of O2 gas to the NH3 gas. Specifically, a satisfactory CD shift value can be obtained when the flow ratio is from 0.5 to 20%, and preferably, 5 to 10%.Type: ApplicationFiled: August 5, 2003Publication date: June 8, 2006Applicant: Tokyo Electron LimitedInventors: Shuhei Ogawa, Koichiro Inazawa
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Patent number: 7030028Abstract: A dual damascene structure with a lesser degree of shoulder loss is achieved. In a method for forming a dual damascene structure having a shoulder in an organic low k film layer by dry-etching the organic low k film layer 208 and a mask layer 210 formed over the organic low k film 208 using at least two different mixed gases, a first step in which the mask layer is etched using a first process gas and then the organic low k film layer is etched into a predetermined depth by continuously using the first process gas and a second step following the first step, in which the organic low k film layer is etched using a second process gas are executed. Since a protective wall is formed at a side wall of a via during the first step, the extent of the shoulder loss occurring in the junction region where a trench and a via form a junction can be reduced.Type: GrantFiled: June 26, 2001Date of Patent: April 18, 2006Assignees: Tokyo Electron Limited, NEC CorporationInventors: Takuya Mori, Koichiro Inazawa, Noriyuki Kobayashi, Masahito Sugiura, Yoshihiro Hayashi, Keizo Kinoshita