Patents by Inventor Koichiro Kamata

Koichiro Kamata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120063204
    Abstract: One object is to provide a novel semiconductor device which can hold stored data even when not powered and which has an unlimited number of writing operations. Another object is to reduce a circuit size and to improve reliability of writing and reading of data. When a memory cell using a transistor including an oxide semiconductor layer is subjected to the verification operation and reading of data, a dual-gate transistor showing different threshold voltages is used as a resistor; thus, stable verification operation and reading operation can be performed by only a reference potential circuit.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 15, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro Kamata
  • Publication number: 20120051120
    Abstract: A driving method by which stored data can be retained even with no power supply and the number of writing operations is not limited is provided. The variation of a writing potential to a memory element is suppressed to improve the reliability according to a new driving method. According to the driving method of a semiconductor device, in writing data, the writing potential is increased step-by-step while verifying the reading current, and the result of the reading current is used for the writing current. That is, data writing is performed while verifying whether data writing is performed with an accurate potential. Accordingly, data writing can be performed with high reliability.
    Type: Application
    Filed: August 26, 2011
    Publication date: March 1, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro Kamata
  • Publication number: 20120049901
    Abstract: An object of the invention is to reduce the power consumption of a semiconductor device that requires a plurality of reference potentials and a method of driving the semiconductor device. Disclosed is a semiconductor device having a potential divider circuit in which a potential supplied to a power supply line is resistively divided by resistors connected in series to the power supply line so that a desired potential is output through a switch transistor electrically connected to the power supply line. A drain terminal of the switch transistor is electrically connected to a gate terminal of a transistor provided in a circuit on the output side (or to one terminal of a capacitor) to form a node. The switch transistor has an off current low enough to hold the desired voltage in the node even when the potential is no more supplied to the power supply line.
    Type: Application
    Filed: August 25, 2011
    Publication date: March 1, 2012
    Inventors: Yoshiya Takewaki, Yutaka Shionoiri, Koichiro Kamata
  • Publication number: 20120032785
    Abstract: A protection circuit is designed to operate when the level of a DC power supply potential which is generated in a rectifier circuit is equal to or greater than a predetermined level (a reference level), so as to decrease the level of the generated DC power supply potential. On the other hand, the protection circuit is designed not to operate when the DC power supply potential which is generated in the rectifier circuit is equal to or less than the predetermined level (the reference level), so as to use the generated DC power supply potential without change. A transistor of the protection circuit includes an oxide semiconductor layer, which enables a reduction in the off-state current of the transistor and a reduction in power consumption of the protection circuit.
    Type: Application
    Filed: July 27, 2011
    Publication date: February 9, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20120025627
    Abstract: An object is to provide a power feeding system and a power feeding method which are more convenient for a power feeding user at the power receiving end. An object is to provide a power feeding system and a power feeding method which also allow a power feeding provider (a company) which feeds power (at the power transmitting end) to supply power without waste. A power feeding device which wirelessly supplies power to a power receiver detects the position and the resonant frequency of the power receiver to be supplied with power, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. An efficient power feeding service can be offered by transmitting a power signal to the power receiver at an optimum frequency for high power transmission efficiency.
    Type: Application
    Filed: July 25, 2011
    Publication date: February 2, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yutaka SHIONOIRI, Koichiro KAMATA, Misako SATO, Shuhei MAEDA
  • Publication number: 20120026787
    Abstract: A transistor includes first and second control gates, and a storage gate. The storage gate is made to be a conductor, supplied with a specific potential, and then made to be an insulator, thereby holding the potential. Data is written by making the storage gate a conductor, supplying a potential of data to be stored, and making the storage gate an insulator. Data is read by making the storage gate an insulator, supplying a potential to a read signal line connected to one of a source and a drain of the transistor, supplying a potential for reading data to the first control gate, and then detecting a potential of a bit line connected to the other of the source and the drain.
    Type: Application
    Filed: July 19, 2011
    Publication date: February 2, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideki Uochi, Koichiro Kamata
  • Publication number: 20120025631
    Abstract: An object is to provide a power feeding system and a power feeding method which are more convenient for a power feeding user at the power receiving end, without causing increases in complexity and size of devices. An object is to provide a power feeding system and a power feeding method which also allow a power feeding provider (a company) which feeds power (at the power transmitting end) to supply power without waste. A power feeding device which wirelessly supplies power to a power receiver detects the position and the resonant frequency of the power receiver by receiving a position and resonant frequency detection signal using a plurality of sub-carriers having different frequencies from the power receiver, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. An efficient power feeding service can be offered by transmitting a power signal to the power receiver at an optimum frequency for high power transmission efficiency.
    Type: Application
    Filed: July 25, 2011
    Publication date: February 2, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yutaka SHIONOIRI, Koichiro KAMATA, Misako SATO, Shuhei MAEDA
  • Publication number: 20120025611
    Abstract: A power feeding device which wirelessly supplies power to a power receiver receives a position and resonant frequency detection signal from the power receiver, detects the position and the resonant frequency of the power receiver, and controls the frequency of a power signal to be transmitted to the power receiver on the basis of the information. As the power signal for power transmission, two signals having different frequencies, which are generated using a mixer by mixing a base carrier (a first signal) with a conversion carrier (a second signal) generated on the basis of the resonant frequency, are used.
    Type: Application
    Filed: July 25, 2011
    Publication date: February 2, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koichiro KAMATA, Misako SATO, Shuhei MAEDA
  • Publication number: 20110317500
    Abstract: Disclosed is a semiconductor device having a memory cell which comprises a transistor having a control gate and a storage gate. The storage gate comprises an oxide semiconductor and is able to be a conductor and an insulator depending on the potential of the storage gate and the potential of the control gate. Data is written by setting the potential of the control gate to allow the storage gate to be a conductor, supplying a potential of data to be stored to the storage gate, and setting the potential of the control gate to allow the storage gate to be an insulator. Data is read by supplying a potential for reading to a read signal line connected to one of a source and a drain of the transistor and detecting the change in potential of a bit line connected to the other of the source and the drain.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hideki Uochi, Koichiro Kamata
  • Publication number: 20110309689
    Abstract: In electric power supply through wireless signals, electric power is supplied efficiently, even when distance fluctuation is caused between an electric power transmitting device and an electric power receiving device. Even when distance fluctuation is caused between the electric power transmitting device for supplying electric power with the use of wireless signals and the electric power receiving device for receiving electric power supplied from the electric power transmitting device, the Q value of the electric power transmitting device is adjusted to optimize the transmission efficiency. The impedance of a resonance circuit of the electric power transmitting device is fluctuated at a constant frequency, the resulting reflected wave is detected as a response signal by the electric power transmitting device, and the Q value of the electric power transmitting device is adjusted to optimize the transmission efficiency.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110310381
    Abstract: An object is to provide a photosensor utilizing an oxide semiconductor in which a refreshing operation is unnecessary, a semiconductor device provided with the photosensor, and a light measurement method utilizing the photosensor. It is found that a constant gate current can be obtained by applying a gate voltage in a pulsed manner to a transistor including a channel formed using an oxide semiconductor, and this is applied to a photosensor. Since a refreshing operation of the photosensor is unnecessary, it is possible to measure the illuminance of light with small power consumption through a high-speed and easy measurement procedure. A transistor utilizing an oxide semiconductor having a relatively high mobility, a small S value, and a small off-state current can form a photosensor; therefore, a multifunction semiconductor device can be obtained through a small number of steps.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110303953
    Abstract: It is an object to provide a gas sensor which is formed by a simple manufacturing process. Another object is to provide a gas sensor whose manufacturing cost is reduced. A transistor which includes an oxide semiconductor layer in contact with a gas and which serves as a detector element of a gas sensor, and a transistor which includes an oxide semiconductor layer in contact with a film having a gas barrier property and which forms a detection circuit are formed over one substrate by the same process, whereby a gas sensor using these transistors may be formed.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 15, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110286256
    Abstract: A semiconductor device with a reduced area and capable of higher integration and larger storage capacity is provided. A multi-valued memory cell including a reading transistor which includes a back gate electrode and a writing transistor is used. Data is written by turning on the writing transistor so that a potential according to the data is supplied to a node where one of a source electrode and a drain electrode of the writing transistor and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor and holding a predetermined potential in the node. Data is read by supplying a reading control potential to a control signal line connected to one of a source electrode and a drain electrode of the reading transistor, and then detecting potential change of a reading signal line.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro Kamata
  • Publication number: 20110286290
    Abstract: A period (inverted period) in which a high negative potential is applied to a gate of the transistor is provided between a writing period and a retention period. In the inverted period, supply of positive electric charge from the drain of the transistor to the oxide semiconductor layer is promoted. Thus, accumulation of positive electric charge in the oxide semiconductor layer or at the interface between the oxide semiconductor layer and a gate insulating film can converge in a short time. Therefore, it is possible to suppress a decrease in the positive electric charge in the node electrically connected to the drain of the transistor in the retention period after the inverted period. That is, the temporal change of data stored in the semiconductor device can be suppressed.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro Kamata
  • Publication number: 20110279144
    Abstract: To provide a simple method for evaluating reliability of a transistor, a simple test which correlates with a bias-temperature stress test (BT test) is performed instead of the BT test. Specifically, a gate current value is measured in the state where a voltage lower than the threshold voltage of an n-channel transistor whose channel region includes an oxide semiconductor is applied between a gate and a source of the transistor and a potential applied to a drain is higher than a potential applied to the gate. The evaluation of the gate current value can be simply performed compared to the case where the BT test is performed; for example, it takes short time to measure the gate current value. That is, reliability of a semiconductor device including the transistor can be easily evaluated.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110254095
    Abstract: An object is to reduce the number of manufacturing steps of a semiconductor device, to improve yield of a semiconductor device, or to reduce manufacturing cost of a semiconductor device. One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes, over a substrate, a first transistor having a single crystal semiconductor layer in a channel formation region, a second transistor that is isolated from the first transistor with an insulating layer positioned therebetween and has an oxide semiconductor layer in a channel formation region, and a diode having a single crystal semiconductor layer and a oxide semiconductor layer.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 20, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koichiro KAMATA, Yoshiaki ITO, Takuro OHMARU
  • Publication number: 20110216566
    Abstract: In a rectifier circuit, by using a transistor whose off-state current is small as a so-called diode-connected MOS transistor included in the rectifier circuit, breakdown which is caused when a reverse bias is applied is prevented. Thus, an object is to provide a rectifier circuit whose reliability is increased and rectification efficiency is improved. A gate and a drain of a transistor are both connected to a terminal of the rectifier circuit to which an AC signal is input. In the transistor, an oxide semiconductor is used for a channel formation region and the off-state current at room temperature is less than or equal to 10?20 A/?m, which is equal to 10 zA/?m (z: zepto), when the source-drain voltage is 3.1 V.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110187435
    Abstract: To prevent damage on an element even when a voltage high enough to break the element is input. A semiconductor device of the invention operates with a first voltage and includes a protection circuit which changes the value of the first voltage when the absolute value of the first voltage is higher than a reference value. The protection circuit includes: a control signal generation circuit generating a second voltage based on the first voltage and outputting the generated second voltage; and a voltage control circuit. The voltage control circuit includes a transistor which has a source, a drain, and a gate, and which is turned on or off depending on the second voltage input to the gate and thus controls whether the value of the first voltage is changed based on the amount of current flowing between the source and the drain. The transistor also includes an oxide semiconductor layer.
    Type: Application
    Filed: January 24, 2011
    Publication date: August 4, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110121911
    Abstract: A modulation circuit includes a load and a transistor serving as a switch. The transistor has an oxide semiconductor layer in which hydrogen concentration is 5×1019/cm3 or less. The off-state current of the transistor is 1×10?13 A or less. A modulation circuit includes a load, a transistor serving as a switch, and a diode. The load, the transistor, and the diode are connected in series between the terminals of an antenna. The transistor has an oxide semiconductor layer in which hydrogen concentration is 5×1019/cm3 or less. An off-state current of the transistor is 1×10?13 A or less. On/off of the transistor is controlled in accordance with a signal inputted to a gate of the transistor. The load is a resistor, a capacitor, or a combination of a resistor and a capacitor.
    Type: Application
    Filed: November 17, 2010
    Publication date: May 26, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro KAMATA
  • Publication number: 20110122673
    Abstract: A nonvolatile memory includes a memory cell including a first transistor and a second transistor. The first transistor includes a first channel, a first gate electrode, a first source electrode, and a first drain electrode. The second transistor includes a second channel made of oxide semiconductor material, a second gate electrode, a second source electrode, and a second drain electrode. One of the second source electrode and the second drain electrode is electrically connected to the first gate electrode. Data writing in the memory cell is done by raising the potential of a node between one of the second source electrode and the second drain electrode and the first gate electrode. Data erasure in the memory cell is done by irradiating the second channel with ultraviolet light and lowering the potential of the node.
    Type: Application
    Filed: November 22, 2010
    Publication date: May 26, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koichiro KAMATA, Yusuke SEKINE