Abstract: A capacitive element that can efficiently reduce high-frequency noise generated in a circuit is provided. A capacitive element 1 includes a capacitive formation portion 100, which is formed in the shape of a loop to separate the inside from the outside. The capacitive formation portion 100 includes an electrode 110, an opposite electrode 111, and a dielectric layer 120. One or more outgoing terminals (one or more outer circumference outgoing terminals 140, and one or more internal circumference outgoing terminals 130) are provided at the outer and inner circumferences of the electrode 110, respectively. A printed wiring board is made by mounting the capacitive element inside the board or on the surface of the board. A semiconductor package is made by putting the capacitive element 1 on a target semiconductor circuit portion. Moreover, a semiconductor circuit is made by placing the capacitive element on a target functional circuit portion 301.

Abstract: [Problem to be Solved] To provide a helical capacitor for controlling a high-frequency power which flows in power lines, and a manufacturing method of the helical capacitor. [Solution] A helical capacitor is constituted by helically spiraling a belt shape capacitor line 1001 which includes an internal metal body to be a helically spiraled belt-shape internal electrical conductor, a dielectric film covering the internal electrical conductor, and an electrically conductive layer covering the dielectric film. The capacitor line of belt shape 1001 can be wrapped around the internal support body 1200. Internal metal body lead terminals 1311, 1321 are respectively formed at both ends of the internal metal body, and electrically conductive layer lead terminals 1312, 1322 can be respectively formed at both ends of the electrically conductive layer.

Abstract: [Problem to be Solved] To provide a helical capacitor for controlling a high-frequency power which flows in power lines, and a manufacturing method of the helical capacitor. [Solution] A helical capacitor is constituted by helically spiraling a belt shape capacitor line 1001 which includes an internal metal body to be a helically spiraled belt-shape internal electrical conductor, a dielectric film covering the internal electrical conductor, and an electrically conductive layer covering the dielectric film. The capacitor line of belt shape 1001 can be wrapped around the internal support body 1200. Internal metal body lead terminals 1311, 1321 are respectively formed at both ends of the internal metal body, and electrically conductive layer lead terminals 1312, 1322 can be respectively formed at both ends of the electrically conductive layer.

Abstract: Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.

Abstract: Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.

Abstract: [Problem to be Solved] To provide a helical capacitor for controlling a high-frequency power which flows in power lines, and a manufacturing method of the helical capacitor. [Solution] A helical capacitor is constituted by helically spiraling a belt shape capacitor line 1001 which includes an internal metal body to be a helically spiraled belt-shape internal electrical conductor, a dielectric film covering the internal electrical conductor, and an electrically conductive layer covering the dielectric film. The capacitor line of belt shape 1001 can be wrapped around the internal support body 1200. Internal metal body lead terminals 1311, 1321 are respectively formed at both ends of the internal metal body, and electrically conductive layer lead terminals 1312, 1322 can be respectively formed at both ends of the electrically conductive layer.

Abstract: A capacitive element that can efficiently reduce high-frequency noise generated in a circuit is provided. A capacitive element 1 includes a capacitive formation portion 100, which is formed in the shape of a loop to separate the inside from the outside. The capacitive formation portion 100 includes an electrode 110, an opposite electrode 111, and a dielectric layer 120. One or more outgoing terminals (one or more outer circumference outgoing terminals 140, and one or more internal circumference outgoing terminals 130) are provided at the outer and inner circumferences of the electrode 110, respectively. A printed wiring board is made by mounting the capacitive element inside the board or on the surface of the board. A semiconductor package is made by putting the capacitive element 1 on a target semiconductor circuit portion. Moreover, a semiconductor circuit is made by placing the capacitive element on a target functional circuit portion 301.

Abstract: The capacitive element of the present invention includes a plurality of cylindrical metal pieces having different sizes, which are disposed in multiple layers surrounding a strip-shaped metal piece. A dielectric film and a conductive material layer are located between the metal piece innermostly located among the plurality of cylindrical metal pieces, and the strip-shaped metal piece, and between adjoining cylindrical metal pieces. Further, the dielectric film and the conductive material layer are laminated and disposed at positions symmetric with respect to the side wall of respective cylindrical metal piece.

Abstract: To suppress electromagnetic waves leaking through a power distribution circuit provided on a printed wiring board or a semiconductor package, and to prevent a degradation of a waveform of a signal excited by a high-speed digital circuit. A metal 10 is provided which has a dielectric coating 20 on its surfaces and is shaped like a long plate with a valve action, and the valve metal is coated with a layer 30 of a conductive material via the dielectric coating 20, so that a characteristic impedance viewed from an input terminal can be reduced over a wide band.

Abstract: Electromagnetic waves leaking from a power distribution circuit provided on a printed wiring substrate or in a semiconductor package are suppressed, and degradation of the waveform of a signal generated by a high-speed digital circuit. A strip line device comprises an elongated metal plate (10) having a valve action and coated with a dielectric film (20). A conductive layer (30) is formed to cover the valve-acting metal, with the dielectric film (20) interposed therebetween. The characteristic impedance as seen from its input terminal can be low over a wide range.

Abstract: An element of parallel flat plate line type suitable for operation at a higher speed and with a higher frequency is provided.

Abstract: Electromagnetic waves leaking from a power distribution circuit provided on a printed wiring substrate or in a semiconductor package are suppressed, and degradation of the waveform of a signal generated by a high-speed digital circuit. A strip line device comprises an elongated metal plate (10) having a valve action and coated with a dielectric film (20). A conductive layer (30) is formed to cover the valve-acting metal, with the dielectric film (20) interposed therebetween. The characteristic impedance as seen from its input terminal can be low over a wide range.

Abstract: An element of parallel flat plate line type suitable for operation at a higher speed and with a higher frequency is provided.

Abstract: Disclosed is a continuous line process for making a pre-formed object having a plurality of surfaces comprising the steps of: (1) providing a sol phase of the composition comprising a solvent and a gelling agent having a sol-gel transition point between about the melting point of the solvent and about the boiling point of the solvent; (2) forming surfaces of the sol phase composition by passing through a surface forming system, the surface forming system pressing the sol phase composition between a plurality of liners; (3) cooling the sol phase composition into a gel phase; and (4) cutting the gel phase composition; wherein the pre-formed object is free of a supporting substrate.

Abstract: A continuous line process for making a packaged cosmetic device comprising a pre-formed sheet and a coating composition in a sealed package, wherein the pre-formed sheet is produced from a sol phase composition comprising a solvent and a gelling agent having a sol-gel transition point between about the melting point of the solvent and about the boiling point of the solvent by a process comprising heating the so phase composition, forming surfaces of the sol phase composition by pressing the sol phase composition between a plurality of liners, cooling the sol phase composition into a gel phase, cutting the gel phase composition to form the pre-formed sheet.

Abstract: Disclosed is a continuous line process for making a pre-formed object having a plurality of surfaces comprising the steps of: (1) providing a sol phase of the composition comprising a solvent and a gelling agent having a sol-gel transition point between about the melting point of the solvent and about the boiling point of the solvent; (2) forming surfaces of the sol phase composition by passing through a surface forming system, the surface forming system pressing the sol phase composition between a plurality of liners; (3) cooling the sol phase composition into a gel phase; and (4) cutting the gel phase composition; wherein the pre-formed object is free of a supporting substrate.

Abstract: Disclosed is a continuous line process for making a pre-formed object having a plurality of surfaces comprising the steps of: (1) providing a sol phase of the composition comprising a solvent and a gelling agent having a sol-gel transition point between about the melting point of the solvent and about the boiling point of the solvent; (2) forming surfaces of the sol phase composition by passing through a surface forming system, the surface forming system pressing the sol phase composition between a plurality of liners; (3) cooling the sol phase composition into a gel phase; and (4) cutting the gel phase composition; wherein the pre-formed object is free of a supporting substrate.

Abstract: Disclosed is a continuous line process for making a pre-formed object having a plurality of surfaces comprising the steps of: (1) providing a sol phase of the composition comprising a solvent and a gelling agent having a sol-gel transition point between about the melting point of the solvent and about the boiling point of the solvent; (2) forming surfaces of the sol phase composition by passing through a surface forming system, the surface forming system pressing the sol phase composition between a plurality of liners; (3) cooling the sol phase composition into a gel phase; and (4) cutting the gel phase composition; wherein the pre-formed object is free of a supporting substrate.