Patents by Inventor Koichiro Sakanishi

Koichiro Sakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9231082
    Abstract: A general insulated gate power semiconductor active element with many gate electrodes arranged in parallel has a laminated structure including a barrier metal film and a thick aluminum electrode film formed over the gate electrodes via an interlayer insulating film. When the aluminum electrode film is embedded in between the gate electrodes in parallel, voids may be generated with the electrodes. Such voids allow the etchant to penetrate in wet etching, which may promote the etching up to a part of the electrode film in an active cell region which is to be left. Thus, an insulated gate power semiconductor device is provided to include gate electrodes protruding outward from the inside of the active cell region, and a gate electrode coupling portion for coupling the gate electrodes outside the active cell region. The gate electrode coupling portion is covered with a metal electrode covering the active cell region.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: January 5, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Koichiro Sakanishi, Tsuyoshi Kachi, Koji Fujishima
  • Publication number: 20150179762
    Abstract: A general insulated gate power semiconductor active element with many gate electrodes arranged in parallel has a laminated structure including a barrier metal film and a thick aluminum electrode film formed over the gate electrodes via an interlayer insulating film. When the aluminum electrode film is embedded in between the gate electrodes in parallel, voids may be generated with the electrodes. Such voids allow the etchant to penetrate in wet etching, which may promote the etching up to a part of the electrode film in an active cell region which is to be left. Thus, an insulated gate power semiconductor device is provided to include gate electrodes protruding outward from the inside of the active cell region, and a gate electrode coupling portion for coupling the gate electrodes outside the active cell region. The gate electrode coupling portion is covered with a metal electrode covering the active cell region.
    Type: Application
    Filed: March 2, 2015
    Publication date: June 25, 2015
    Applicant: Renesas Electronics Corporation
    Inventors: Koichiro Sakanishi, Tsuyoshi Kachi, Koji Fujishima
  • Patent number: 8969929
    Abstract: A general insulated gate power semiconductor active element with many gate electrodes arranged in parallel has a laminated structure including a barrier metal film and a thick aluminum electrode film formed over the gate electrodes via an interlayer insulating film. When the aluminum electrode film is embedded in between the gate electrodes in parallel, voids may be generated with the electrodes. Such voids allow the etchant to penetrate in wet etching, which may promote the etching up to a part of the electrode film in an active cell region which is to be left. Thus, an insulated gate power semiconductor device is provided to include gate electrodes protruding outward from the inside of the active cell region, and a gate electrode coupling portion for coupling the gate electrodes outside the active cell region. The gate electrode coupling portion is covered with a metal electrode covering the active cell region.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 3, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Koichiro Sakanishi, Tsuyoshi Kachi, Koji Fujishima
  • Publication number: 20120074472
    Abstract: A general insulated gate power semiconductor active element with many gate electrodes arranged in parallel has a laminated structure including a barrier metal film and a thick aluminum electrode film formed over the gate electrodes via an interlayer insulating film. When the aluminum electrode film is embedded in between the gate electrodes in parallel, voids may be generated with the electrodes. Such voids allow the etchant to penetrate in wet etching, which may promote the etching up to a part of the electrode film in an active cell region which is to be left. Thus, an insulated gate power semiconductor device is provided to include gate electrodes protruding outward from the inside of the active cell region, and a gate electrode coupling portion for coupling the gate electrodes outside the active cell region. The gate electrode coupling portion is covered with a metal electrode covering the active cell region.
    Type: Application
    Filed: September 21, 2011
    Publication date: March 29, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Koichiro Sakanishi, Tsuyoshi Kachi, Koji Fujishima