Patents by Inventor Koichiro Yamaguchi

Koichiro Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250095246
    Abstract: Provided are a method, system, and device for generating synthetic images. The method may include, receiving an input image; removing at least one pre-existing object from the input image; inpainting the region where the at least one pre-existing object was removed; estimating a position of another pre-existing object from the input image; generating a layout over the input image based on the estimated position; and generating a synthetic object based on the layout.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: WOVEN BY TOYOTA, INC.
    Inventor: Koichiro YAMAGUCHI
  • Patent number: 12216647
    Abstract: Provided are a method, system, and device for a neural architecture search (NAS) pipeline for performing an optimized neural architecture search (NAS). The method may include obtaining a first search space comprising a plurality of candidate layers for a neural network architecture; performing a training-free NAS in the first search space to obtain a first set of architectures; obtaining a second search space based on the first set of architectures; performing a gradient-based search in the second search space to obtain a second set of architectures; performing a sampling method search utilizing the second set of architectures as an initial sample; and obtaining an output architecture as an output of the sampling method search.
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: February 4, 2025
    Assignee: WOVEN BY TOYOTA, INC.
    Inventor: Koichiro Yamaguchi
  • Publication number: 20250028713
    Abstract: Provided are a method, system, and device for a neural architecture search (NAS) pipeline for performing an optimized neural architecture search (NAS). The method may include obtaining a first search space comprising a plurality of candidate layers for a neural network architecture; performing a training-free NAS in the first search space to obtain a first set of architectures; obtaining a second search space based on the first set of architectures; performing a gradient-based search in the second search space to obtain a second set of architectures; performing a sampling method search utilizing the second set of architectures as an initial sample; and obtaining an output architecture as an output of the sampling method search.
    Type: Application
    Filed: July 17, 2023
    Publication date: January 23, 2025
    Applicant: WOVEN BY TOYOTA, INC.
    Inventor: Koichiro YAMAGUCHI
  • Publication number: 20240414913
    Abstract: A method of controlling a memory device includes receiving a write instruction, starting a write operation to a first address in response to the write instruction, receiving a first read instruction of the first address, suspending the write operation, applying a read voltage to a word line corresponding to the first address in a first read operation in response to the first read instruction, resuming the write operation after applying the read voltage, and outputting read data corresponding to the first address from a data register during a period starting at resuming the write operation and ending at completion of the write operation.
    Type: Application
    Filed: August 20, 2024
    Publication date: December 12, 2024
    Applicant: Kioxia Corporation
    Inventor: Koichiro YAMAGUCHI
  • Publication number: 20240320484
    Abstract: A method for performing a one-shot neural architecture search (NAS) includes obtaining an overall network, the overall network including a plurality of candidate subnetworks for the one-shot NAS, obtaining a first subnetwork of the plurality of candidate subnetworks from the overall network, obtaining a first metric value of the first subnetwork, determining whether the first metric value satisfies a first predetermined condition, based on determining that the first metric value does not satisfy the first predetermined condition, determining not to train the obtained first subnetwork for the one-shot NAS and obtaining a second subnetwork of the plurality of candidate subnetworks from the overall network, and training the second subnetwork for the one-shot NAS.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 26, 2024
    Applicant: WOVEN BY TOYOTA, INC.
    Inventor: Koichiro YAMAGUCHI
  • Publication number: 20240320497
    Abstract: Provided are method, system, and device for performing an optimized neural architecture search (NAS) by using both a gradient-based search and a sampling method on a search space. The method may include obtaining a first search space comprising a plurality of candidate layers for a neural network architecture; performing a gradient-based search in the first search space to obtain a first architecture; performing a sampling method search utilizing the first architecture as an initial sample; and obtaining a second architecture as an output of the sampling method search.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 26, 2024
    Applicant: WOVEN BY TOYOTA, INC.
    Inventor: Koichiro YAMAGUCHI
  • Patent number: 12096628
    Abstract: A method of controlling a memory device includes receiving a write instruction; starting a write operation to a first address in response to the write instruction; receiving a first read instruction of the first address; suspending the write operation; and applying a read voltage to a word line corresponding to the first address in a first read operation in response to the first read instruction. The method further includes resuming the write operation is after applying the read voltage; receiving a second read instruction after applying the read voltage; and outputting read data from a data register in response to the second read instruction during a period starting at resuming the write operation and ending at completion of the write operation.
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: September 17, 2024
    Assignee: Kioxia Corporation
    Inventor: Koichiro Yamaguchi
  • Publication number: 20240256892
    Abstract: A method includes receiving a first model and collecting sensor data acquired by a sensor on a first vehicle. The method also includes identifying a first data item from among the collected sensor data when the first data item is determined to satisfy a criterion. The method further include detecting an object contained in the identified first data item by running the first model with the identified first data item as input and establishing communication with a computer on a second vehicle located at equal to or less than a predetermined distance from the first vehicle. The method also includes receiving a second data item that is indicated as containing the object from the computer on the second vehicle and generating a training dataset. The method further includes training with respect to the first model on the training dataset and transmitting first data representing the trained first model.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Applicant: WOVEN BY TOYOTA, INC.
    Inventors: Yuki KAWANA, Yusuke YACHIDE, Takaaki TAGAWA, Koichiro YAMAGUCHI, Daisuke HASHIMOTO, Hiroyuki AONO, Ryo TAKAHASHI
  • Publication number: 20240220838
    Abstract: A method for calculating combination optimization using a quantum computer configured to execute quantum calculation by a quantum circuit having a parameter representing a phase rotation amount, and a classical computer that calculates a feedback amount based on an output of the quantum computer and newly adds, to the quantum computer, the quantum circuit having the calculated feedback amount as the parameter includes: multiplying, in the classical computer, the feedback amount by a gain having a positive value such that a magnitude of the gain approaches zero as the quantum circuit is added.
    Type: Application
    Filed: March 14, 2024
    Publication date: July 4, 2024
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Koichiro YAMAGUCHI, Takahiro OHYAMA, Eiichi ABE
  • Publication number: 20240220817
    Abstract: A method includes receiving, from one or more server computers through a communication network, an edge model and collecting sensor data acquired by a sensor on a vehicle. The method also includes identifying a first data item from among the collected sensor data when the first data item is determined to satisfy a criterion. The method further includes applying a transformation to the identified first data item to generate a second data item to form a training dataset containing the first data item, the second data item, and a signal representing the transformation between the first data item and the second data item. The method further includes training with respect to the edge model on the training dataset and transmitting first data representing the trained edge model to the one or more server computers though the communication network.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Applicant: WOVEN BY TOYOTA, INC.
    Inventors: Yuki KAWANA, Yusuke Yachide, Takaaki Tagawa, Koichiro Yamaguchi, Daisuke Hashimoto, Hiroyuki Aono, Ryo Takahashi
  • Publication number: 20240220816
    Abstract: A method includes receiving, from one or more server computers through a communication network, a first model and collecting sensor data acquired by a sensor on a vehicle. The method also includes identifying a first data item from among the collected sensor data when the first data item is determined to satisfy a criterion. The method further include deriving an inference signal by running a trained second model using the first data item as input to the second model to provide a training dataset that contains the identified first data item and the derived inference signal as a supervision signal corresponding to the identified first data item. The method further includes training with respect to the first model on the training dataset and transmitting first data representing the trained first model to the one or more server computers though the communication network.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 4, 2024
    Applicant: WOVEN BY TOYOTA, INC.
    Inventors: Yuki Kawana, Yusuke Yachide, Takaaki Tagawa, Koichiro Yamaguchi, Daisuke Hashimoto, Hiroyuki Aono, Ryo Takahashi
  • Patent number: 11781877
    Abstract: A delivery plan generation method includes: acquiring delivery range information regarding a delivery range of an article; acquiring feature information items for each of roads corresponding to the delivery range information; acquiring road network information indicating a connection relationship between the roads; acquiring learning information items each corresponding to a corresponding one of the feature information items; computing road costs each corresponding to a corresponding one of the roads based on the feature information items and the learning information items; and generating a delivery plan by using the road network information and the road costs. The learning information items are generated based on a travel history of a delivery vehicle delivering the article and the feature information items for each of roads corresponding to the travel history.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: October 10, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Koichiro Yamaguchi
  • Publication number: 20230301086
    Abstract: A method of controlling a memory device includes receiving a write instruction; starting a write operation to a first address in response to the write instruction; receiving a first read instruction of the first address; suspending the write operation; and applying a read voltage to a word line corresponding to the first address in a first read operation in response to the first read instruction. The method further includes resuming the write operation is after applying the read voltage; receiving a second read instruction after applying the read voltage; and outputting read data from a data register in response to the second read instruction during a period starting at resuming the write operation and ending at completion of the write operation.
    Type: Application
    Filed: April 25, 2023
    Publication date: September 21, 2023
    Applicant: Kioxia Corporation
    Inventor: Koichiro YAMAGUCHI
  • Publication number: 20230259873
    Abstract: A delivery plan generation device includes: a processor; a communication unit configured to acquire delivery range information indicating a delivery range of an article; and a memory configured to store past congestion information and road feature information indicating characteristics of roads corresponding to the delivery range information. The processor acquires road network information indicating a connection relationship between the roads, acquires learning information generated based on a travel history of a delivery vehicle that delivers an article, and past congestion information and road feature information on the roads corresponding to the travel history, acquires congestion information on the roads for a scheduled delivery time, calculates road costs for the roads based on the road feature information, the congestion information for the scheduled delivery time, and the learning information, and generates a delivery plan of the article by using the road network information and the road costs.
    Type: Application
    Filed: June 17, 2021
    Publication date: August 17, 2023
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Koichiro YAMAGUCHI
  • Patent number: 11706916
    Abstract: A method of controlling a memory device includes receiving a write instruction; starting a write operation to a first address in response to the write instruction; receiving a first read instruction of the first address; suspending the write operation; and applying a read voltage to a word line corresponding to the first address in a first read operation in response to the first read instruction.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: July 18, 2023
    Assignee: Kioxia Corporation
    Inventor: Koichiro Yamaguchi
  • Publication number: 20220005816
    Abstract: A method of controlling a memory device includes receiving a write instruction; starting a write operation to a first address in response to the write instruction; receiving a first read instruction of the first address; suspending the write operation; and applying a read voltage to a word line corresponding to the first address in a first read operation in response to the first read instruction.
    Type: Application
    Filed: September 21, 2021
    Publication date: January 6, 2022
    Applicant: Kioxia Corporation
    Inventor: Koichiro YAMAGUCHI
  • Patent number: 11158645
    Abstract: According to one embodiment, a semiconductor memory device including a first memory cell; a word line; a bit line; a row decoder; a sense amplifier including a latch circuit; a data register; and a control circuit capable of suspending a write operation during the write operation of the first memory cell to perform a read operation of the first memory cell. In a read operation of the first memory cell performed while suspending the write operation, the row decoder applies a read voltage to the word line, and the sense amplifier transmits data read from the first memory cell to the data register as read data when writing to the first memory cell is completed, and transfers write data held by the latch circuit to the data register as the read data when the writing is not completed.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: October 26, 2021
    Assignee: KIOXIA CORPORATION
    Inventor: Koichiro Yamaguchi
  • Publication number: 20210090007
    Abstract: A demand prediction device includes a memory and a processor that, when executing instructions stored in the memory, performs a process which includes acquiring an input variable including delivery date and time, predicting a heat map corresponding to the input variable by using a heat map prediction model for predicting a heat map which indicates, for each segment, the number of distributions of delivery destinations distributed in at least one of a plurality of segments constituting a delivery target area, predicting the minimum number of delivery vehicles corresponding to the predicted heat map by using a minimum delivery vehicle number prediction model for predicting the minimum number of the delivery vehicles for delivering a package to the delivery destination, and determining the predicted minimum number of the delivery vehicles as the number of delivery vehicles at the delivery date and time included in the input variable.
    Type: Application
    Filed: December 7, 2020
    Publication date: March 25, 2021
    Inventors: Koichiro YAMAGUCHI, Yoshiyuki OKIMOTO
  • Publication number: 20200249040
    Abstract: A delivery plan generation method includes: acquiring delivery range information regarding a delivery range of an article; acquiring feature information items for each of roads corresponding to the delivery range information; acquiring road network information indicating a connection relationship between the roads; acquiring learning information items each corresponding to a corresponding one of the feature information items; computing road costs each corresponding to a corresponding one of the roads based on the feature information items and the learning information items; and generating a delivery plan by using the road network information and the road costs. The learning information items are generated based on a travel history of a delivery vehicle delivering the article and the feature information items for each of roads corresponding to the travel history.
    Type: Application
    Filed: April 22, 2020
    Publication date: August 6, 2020
    Inventor: Koichiro YAMAGUCHI
  • Publication number: 20200161320
    Abstract: According to one embodiment, a semiconductor memory device including a first memory cell; a word line; a bit line; a row decoder; a sense amplifier including a latch circuit; a data register; and a control circuit capable of suspending a write operation during the write operation of the first memory cell to perform a read operation of the first memory cell. In a read operation of the first memory cell performed while suspending the write operation, the row decoder applies a read voltage to the word line, and the sense amplifier transmits data read from the first memory cell to the data register as read data when writing to the first memory cell is completed, and transfers write data held by the latch circuit to the data register as the read data when the writing is not completed.
    Type: Application
    Filed: January 22, 2020
    Publication date: May 21, 2020
    Applicant: KIOXIA CORPORATION
    Inventor: Koichiro YAMAGUCHI