Patents by Inventor Koji Higuchi

Koji Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9406279
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: August 2, 2016
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Koji Higuchi, Atsushi Hirama
  • Publication number: 20160192651
    Abstract: To provide a compound highly active against pests, a pesticide using the compound, and a method for controlling pests by applying the compound. A phenoxyalkylbenzamide compound represented by the formula (I) or its salt; a pesticide containing it as an active ingredient, and a controlling method, which comprises applying an effective amount of the compound: wherein R1, Y and R3 are a hydrogen atom or the like, and Ar is as follows: wherein R4 and R7 are halogen or the like, R5 and R6 are a hydrogen atom or the like, m is from 0 to 5, and n is from 0 to 3.
    Type: Application
    Filed: August 22, 2014
    Publication date: July 7, 2016
    Applicant: ISHIHARA SANGYO KAISHA, LTD.
    Inventors: Koji HIGUCHI, DamdinSuren BOLDBAATAR, Yuta TAZAWA, Michiko KANUMA
  • Patent number: 9359162
    Abstract: A conveyance mechanism by which a recording medium can be conveyed intermittently; a recording mechanism for recording by reciprocatingly scanning a recording head in a direction that intersects with a direction of conveyance of the recording medium by the conveyance mechanism; a turret to which a plurality of take-up spindles for taking up the recording medium are provided; rotational mechanisms of the take-up spindles; a rotational mechanism of the turret; and a control unit for controlling the rotational mechanisms of the take-up spindles and the rotational mechanism of the turret so as to cause the take-up spindles and/or the turret to be rotated intermittently so as to correspond to the intermittent conveyance by the conveyance mechanism.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: June 7, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Hidemasa Kanada, Masato Mitsuhashi, Koji Higuchi, Toshimitsu Hirai, Mitsuhiro Isobe
  • Patent number: 9327521
    Abstract: A recording apparatus includes a plurality of line heads that discharge light curable inks onto a recording target material, a plurality of first light irradiators that are located at downstream side of transportation direction relative to the respective line heads in the transportation direction and emit light to the recording target material, a drum that is located at the downstream side relative to the first light irradiators in the transportation direction and forms a part of the transportation path, and a second light irradiator that is located opposite to a portion of the drum with which the transported recording target material makes contact and emits light to the contact portion. In the recording apparatus, the first light irradiators emit light for provisionally curing the discharged light curable inks, and the second light irradiator emits light for permanently curing the light curable inks, which have been provisionally cured, on the drum.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: May 3, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Hidemasa Kanada, Masato Mitsuhashi, Koji Higuchi, Toshimitsu Hirai, Mitsuhiro Isobe
  • Publication number: 20160090255
    Abstract: A medium detection mechanism includes a medium guide that holds a medium and an optical sensor including an irradiation section that emits irradiation light to the medium guide and a light receiving section that receives reflected light. An amount of received light that is received by the light receiving section from among reflected light of external light that enters the medium guide and reflected light of the irradiation light is smaller than or equal to a predetermined value.
    Type: Application
    Filed: September 28, 2015
    Publication date: March 31, 2016
    Inventor: Koji HIGUCHI
  • Publication number: 20160079926
    Abstract: An amplifying circuit includes a first differential amplifier (first differential pair) and a second differential amplifier (second differential pair) having an input capacitance smaller than the first differential amplifier. The amplifying circuit switches between the first differential amplifier (first differential pair) and the second differential amplifier (second differential pair) in response to an amplification mode setting signal to perform amplification processing of an input signal.
    Type: Application
    Filed: September 15, 2015
    Publication date: March 17, 2016
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroyoshi ICHIKURA, Koji HIGUCHI
  • Publication number: 20160071479
    Abstract: A driver circuit driving a display device comprises: a gradation voltage generating circuit for generating m gradation voltages (m is an integer larger than or equal to 2) indicative of m stages of gradation levels; n decoder circuits each configured to select, out of the m gradation voltages, n drive voltages (n is an integer larger than or equal to 2) corresponding to n data pieces on the basis of n input gradation signals; m gradation voltage wirings each for transferring the m gradation voltages to the n decoder circuits, respectively; and a charge supplementing circuit for supplementing each of the m gradation voltage wirings with an amount of electric charge when a voltage drop occurs in the gradation voltage wirings.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 10, 2016
    Applicant: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenichi SHIIBAYASHI, Koji HIGUCHI
  • Publication number: 20160071453
    Abstract: When the offsets of the first and second differential units have polarities different from each other, the first and second differential units are both set to a normal connection state, i.e., a state in which the input voltage is supplied to the first input terminal of each of the first and second differential units and the output voltage is supplied to the second input terminal of each of the first and second differential units. When the offsets of the first and second differential units have the same polarity, on the other hand, the first differential unit is set to the above normal connection state and the second differential unit is set to a chopping connection state in which the output voltage is supplied to the first input terminal and the input voltage is supplied to the second input terminal.
    Type: Application
    Filed: September 3, 2015
    Publication date: March 10, 2016
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Koji HIGUCHI
  • Patent number: 9202425
    Abstract: A driving circuit includes a pair of operational amplifiers, one producing an analog voltage output of positive polarity, the other producing an analog voltage output of negative polarity. An output switching circuit interchanges these outputs between a pair of data lines. One or both of the operational amplifiers includes a parasitic diode having one terminal connected to the output terminal of the operational amplifier and another terminal normally connected to a power supply voltage of the operational amplifier. When the output of the operational amplifier is switched, a protective switching circuit temporarily disconnects the parasitic diode from the power supply of the operational amplifier and instead connects it to a power supply line carrying a voltage high enough, or low enough, to ensure that the parasitic diode is not forward biased by the existing voltage on the data line to which the output is switched.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: December 1, 2015
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Hideaki Hasegawa, Atsushi Hirama, Koji Higuchi
  • Publication number: 20150287388
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, Koji HIGUCHI, Atsushi HIRAMA
  • Patent number: 9099026
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: August 4, 2015
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Koji Higuchi, Atsushi Hirama
  • Patent number: 9059527
    Abstract: A connector comprises a housing, a power contact attached to the housing, and a fixing member fixing the power contact to the housing. The connector is mateable along a front-rear direction with a mating connector located at a mating side. The housing has a rear wall, a contact-holding hole and an abutment portion, wherein the contact-holding hole pierces the rear wall in the front-rear direction, and the abutment portion is located toward the mating side with respect to the contact-holding hole.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: June 16, 2015
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Koji Higuchi, Yoshinori Mizusawa
  • Patent number: 8992245
    Abstract: A connector comprises a housing extending in a front-rear direction and a sealing member attached in the housing. The housing has a rear wall located at a rear end portion of the housing and an enclosed portion extending from the rear wall in the front-rear direction. When the housing is formed by a molding process, a metal mold is used to form a plurality of seal stoppers around the enclosed portion. Each of the seal stoppers protrudes from the enclosed portion in a direction perpendicular to the front-rear direction. The housing has a plurality of holes which are formed when the metal mold is removed from the housing. Each of the holes pierces the rear wall in the front-rear direction. The holes face the respective seal stoppers in the front-rear direction. The sealing member is attached to the enclosed portion so as to be located between the rear wall and the seal stoppers in the front-rear direction. The front sides of the holes are covered by the sealing member.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: March 31, 2015
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Koji Higuchi, Osamu Hashiguchi, Yoshinori Mizusawa
  • Patent number: 8876281
    Abstract: A recording apparatus includes a supporting member on which a plurality of suction holes for sucking a recording medium are formed, a transportation device which transports the recording medium along the supporting face, a recording head which ejects fluid on the recording medium supported by the supporting face, and a control device which controls printing when a front end of the recording medium reaches a position at which the front end of the recording medium covers the suction holes.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: November 4, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Koji Higuchi
  • Patent number: 8860204
    Abstract: There is provided a semiconductor device including: plural bit cells each including the same circuit; plural electrodes supplied with power from outside, wherein each of the respective plural electrodes is mounted above the same circuit within the plural bit cells. Further, there is provided a semiconductor package including: the semiconductor device; a substrate mounted with the semiconductor device; an external input terminal formed on the substrate; an external output terminal formed on the substrate; an input wiring pattern connecting the semiconductor device mounted above the substrate and the external input terminal; an output wiring pattern connecting the semiconductor device mounted above the substrate and the external output terminal; and plural power supply lines, arranged without contact with each other on the same face of the substrate, and connecting the plural electrodes mounted to the semiconductor device to the corresponding electrode from the plural external power input electrodes.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 14, 2014
    Assignee: OKI Semiconductor Co., Ltd.
    Inventor: Koji Higuchi
  • Publication number: 20140210920
    Abstract: A recording apparatus includes a plurality of line heads that discharge light curable inks onto a recording target material, a plurality of first light irradiators that are located at downstream side of transportation direction relative to the respective line heads in the transportation direction and emit light to the recording target material, a drum that is located at the downstream side relative to the first light irradiators in the transportation direction and forms a part of the transportation path, and a second light irradiator that is located opposite to a portion of the drum with which the transported recording target material makes contact and emits light to the contact portion. In the recording apparatus, the first light irradiators emit light for provisionally curing the discharged light curable inks, and the second light irradiator emits light for permanently curing the light curable inks, which have been provisionally cured, on the drum.
    Type: Application
    Filed: January 21, 2014
    Publication date: July 31, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hidemasa KANADA, Masato MITSUHASHI, Koji HIGUCHI, Toshimitsu HIRAI, Mitsuhiro ISOBE
  • Publication number: 20140178116
    Abstract: A conveyance mechanism by which a recording medium can be conveyed intermittently; a recording mechanism for recording by reciprocatingly scanning a recording head in a direction that intersects with a direction of conveyance of the recording medium by the conveyance mechanism; a turret to which a plurality of take-up spindles for taking up the recording medium are provided; rotational mechanisms of the take-up spindles; a rotational mechanism of the turret; and a control unit for controlling the rotational mechanisms of the take-up spindles and the rotational mechanism of the turret so as to cause the take-up spindles and/or the turret to be rotated intermittently so as to correspond to the intermittent conveyance by the conveyance mechanism.
    Type: Application
    Filed: December 24, 2013
    Publication date: June 26, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hidemasa KANADA, Masato MITSUHASHI, Koji HIGUCHI, Toshimitsu HIRAI, Mitsuhiro ISOBE
  • Publication number: 20140107138
    Abstract: A fungicidal composition containing, as active ingredients, (a) a benzoylpyridine derivative represented by the following formula or its salt: wherein X is a halogen atom, a nitro group, a substitutable hydrocarbon group, a substitutable alkoxy group, a substitutable aryloxy group, a substitutable cycloalkoxy group, a hydroxyl group, a substitutable alkylthio group, a cyano group, a carboxyl group which may be esterified or amidated, or a substitutable amino group, n is 1, 2, 3 or 4; R1 is a substitutable alkyl group, R2? is a substitutable alkyl group, a substitutable alkoxy group, a substitutable aryloxy group, a substitutable cycloalkoxy group or a hydroxyl group, p is 1, 2 or 3, and R2? is a substitutable alkoxy group or a hydroxyl group, provided that at least two of R2? and R2? optionally form a condensed ring containing an oxygen atom and (b) at least one other fungicide.
    Type: Application
    Filed: December 20, 2013
    Publication date: April 17, 2014
    Applicant: ISHIHARA SANGYO KAISHA, LTD.
    Inventors: Hisaya Nishide, Shigeyuki Nishimura, Shigeru Mitani, Koji Minamida, Fumio Kanamori, Munekazu Ogawa, Shigehisa Kanbayashi, Toyoshi Tanimura, Koji Higuchi, Hidemasa Kominami, Tomohiro Okamoto, Akihiro Nishimura
  • Patent number: 8684492
    Abstract: A recording apparatus includes: a transport unit that unrolls and transports a recording medium being wound in a roll to the downstream side along a transport path of the recording medium; a recording unit that performs recording processing on the recording medium in a recording region positioned halfway on the transport path; and a control unit that controls the transport unit so that an amount of protrusion of the leading edge portion of the recording medium from the recording region to the downstream side is varied based on an amount of curling of the leading edge portion of the recording medium due to the curling tendency of the recording medium having been unrolled by the transport unit when the recording processing is performed on the recording medium by the recording unit.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: April 1, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Masato Mitsuhashi, Koji Higuchi
  • Publication number: 20140085349
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Application
    Filed: September 23, 2013
    Publication date: March 27, 2014
    Applicant: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenichi SHIIBAYASHI, Koji HIGUCHI, Atsushi HIRAMA