Patents by Inventor Koji Hosokawa

Koji Hosokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11937360
    Abstract: A high frequency heating apparatus (1A) includes the following components: a first electrode (11) that is flat; a plurality of flat second electrodes (12) that are flat; a high-frequency power supply (20); a matching unit (30); a controller (40); and an electric field regulator (50). The second electrodes (12) are placed opposite to the first electrode (11). The high-frequency power supply (20) applies a high-frequency voltage to the first electrode (11). The matching unit (30) is placed between the first electrode (11) and the high-frequency power supply (20), and is impedance-matched with the high-frequency power supply (20). The controller (40) controls the high-frequency power supply (20). The electric field regulator (50) individually adjusts the electric field strengths in a plurality of regions located between first electrode (11) and the second electrodes (12). This aspect can reduce uneven heating.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takashi Uno, Daisuke Hosokawa, Fumitaka Ogasawara, Mikio Fukui, Koji Yoshino, Yoshiharu Oomori
  • Patent number: 11847238
    Abstract: An image reading apparatus includes a scanner, an operation panel, a communication interface, and a processor. The scanner is configured to read an image of a document. The operation panel is configured to designate a transmission destination of scan data, the scan data including image data of the document read by the scanner. The communication interface is configured to transmit the scan data to the transmission destination designated on the operation panel. The processor is configured to transmit the scan data to the transmission destination without a password in response to the transmission destination designated on the operation panel being a transmission destination of an operator who operates the operation panel, and transmit the scan data protected with a password to the transmission destination in response to the transmission destination designated on the operation panel including a transmission destination of any person other than the operator.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: December 19, 2023
    Assignee: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Koji Hosokawa
  • Publication number: 20230031510
    Abstract: An image reading apparatus includes a scanner, an operation panel, a communication interface, and a processor. The scanner is configured to read an image of a document. The operation panel is configured to designate a transmission destination of scan data, the scan data including image data of the document read by the scanner. The communication interface is configured to transmit the scan data to the transmission destination designated on the operation panel. The processor is configured to transmit the scan data to the transmission destination without a password in response to the transmission destination designated on the operation panel being a transmission destination of an operator who operates the operation panel, and transmit the scan data protected with a password to the transmission destination in response to the transmission destination designated on the operation panel including a transmission destination of any person other than the operator.
    Type: Application
    Filed: June 20, 2022
    Publication date: February 2, 2023
    Applicant: TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Koji HOSOKAWA
  • Patent number: 10431556
    Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: October 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Sensho Usami, Koji Hosokawa
  • Publication number: 20190098162
    Abstract: According to one embodiment, an image forming apparatus includes a sensor, an auxiliary storage device, and an operation control unit. The sensor detects disturbance. The auxiliary storage device is provided with a storage medium, and a head which performs operations of reading and writing of data with respect to the storage medium. The operation control unit does not perform a data writing operation with respect to the storage medium until a predetermined condition related to the disturbance is satisfied, and performs the data writing operation with respect to the storage medium by controlling the head, when a predetermined condition related to the disturbance is satisfied while the disturbance is detected by the sensor.
    Type: Application
    Filed: September 25, 2017
    Publication date: March 28, 2019
    Inventor: Koji Hosokawa
  • Publication number: 20170373021
    Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.
    Type: Application
    Filed: September 8, 2017
    Publication date: December 28, 2017
    Inventors: Sensho Usami, Koji Hosokawa
  • Patent number: 9799611
    Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 24, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sensho Usami, Koji Hosokawa
  • Patent number: 9748204
    Abstract: According to the present invention, a semiconductor device includes a substrate including a first surface and a second surface opposite to the first surface, a first layer formed over the first surface, a second layer thicker than the first layer formed over the first portion of the first layer, the first and second layers being formed of a same material, a first semiconductor chip mounted over a second portion of the first layer; and a second semiconductor chip commonly mounted over the first semiconductor chip and the second layer.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: August 29, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Sensho Usami, Koji Hosokawa
  • Patent number: 9574159
    Abstract: The invention provides a grease composition for use in an image forming apparatus, containing a thickener, a base oil and a lubricity improver, wherein the thickener is a lithium soap, the base oil is a synthetic hydrocarbon oil, the lubricity improver is a polyethylene oxide wax, and the image forming apparatus is equipped with a sliding member and a member for holding the sliding member which is driven to slide through the holding member via the grease composition, one of the sliding member or the holding member for the sliding member having a sliding surface formed from a metal, and the other having a sliding surface formed from a resin.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: February 21, 2017
    Assignees: KYODO YUSHI CO., LTD., SEIKO EPSON CORPORATION, HOSOKAWA CORPORATION
    Inventors: Kenichiro Matsubara, Masamichi Yamamoto, Satoshi Nakata, Koji Hosokawa
  • Publication number: 20160343675
    Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.
    Type: Application
    Filed: August 5, 2016
    Publication date: November 24, 2016
    Inventors: Sensho Usami, Koji Hosokawa
  • Patent number: 9418968
    Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: August 16, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Sensho Usami, Koji Hosokawa
  • Publication number: 20160079207
    Abstract: [Problem] To provide a semiconductor device suitable for use as an upper-side package of a semiconductor device having a PoP structure. [Solution] This invention is provided with a semiconductor chip (10) flip-chip mounted on one surface (32) of a wiring board (30), and a semiconductor chip (20) flip-chip mounted on the other surface (33) of the wiring board (30), the semiconductor chips (10, 20) being installed in directions that differ by 90°. It is thereby possible to prevent the layout of wiring patterns (41, 42) on the wiring board (30) from becoming locally congested and enhance the freedom of layout. In addition, when the semiconductor chips (10, 20) are mounted on the wiring board (30), the location at which the load concentrates can be held by a stage, thereby making it possible to prevent the wiring board from deforming.
    Type: Application
    Filed: April 16, 2014
    Publication date: March 17, 2016
    Inventors: Masahiro Yamaguchi, Toro Saga, Koji Hosokawa
  • Publication number: 20160064358
    Abstract: According to the present invention, a semiconductor device includes a substrate including a first surface and a second surface opposite to the first surface, a first layer formed over the first surface, a second layer thicker than the first layer formed over the first portion of the first layer, the first and second layers being formed of a same material, a first semiconductor chip mounted over a second portion of the first layer; and a second semiconductor chip commonly mounted over the first semiconductor chip and the second layer.
    Type: Application
    Filed: August 24, 2015
    Publication date: March 3, 2016
    Inventors: Sensho Usami, Koji Hosokawa
  • Publication number: 20150279820
    Abstract: A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of the wiring substrate 30, a sealing resin 71 covering the semiconductor chip 10, a sealing resin 72 covering the semiconductor chip 20, a plurality of conductive posts provided to penetrate through the sealing resin 72, and a plurality of solder balls mounted on second ends of the plurality of conductive posts exposed from the sealing resin 72 are provided; and the mounting directions of the semiconductor chips 10 and 20 are mutually different by 90°. Both of the planar shapes of the semiconductor chips 10 and 20 are rectangular shapes, the semiconductor chip 10 is mounted so that the long sides thereof are parallel to the long sides of the wiring substrate 30, and the semiconductor chip 20 is mounted so that the long sides thereof are perpendicular to the long sides of the wiring substrate 30.
    Type: Application
    Filed: March 25, 2015
    Publication date: October 1, 2015
    Inventors: Sensho Usami, Koji Hosokawa
  • Publication number: 20150065404
    Abstract: The invention provides a grease composition for use in an image forming apparatus, containing a thickener, a base oil and a lubricity improver, wherein the thickener is a lithium soap, the base oil is a synthetic hydrocarbon oil, the lubricity improver is a polyethylene oxide wax, and the image forming apparatus is equipped with a sliding member and a member for holding the sliding member which is driven to slide through the holding member via the grease composition, one of the sliding member or the holding member for the sliding member having a sliding surface formed from a metal, and the other having a sliding surface formed from a resin.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventors: Kenichiro MATSUBARA, Masamichi YAMAMOTO, Satoshi NAKATA, Koji HOSOKAWA
  • Patent number: 8873247
    Abstract: A device includes a wiring board, an element mounted on the wiring board, a spacer member intervening between the wiring board and the element to form a space therebetween, and an encapsulation body filling the space and encapsulating the element on the wiring board.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: October 28, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Koji Hosokawa
  • Publication number: 20140008775
    Abstract: A semiconductor device includes a wiring board, a semiconductor chip mounted over a surface of the wiring board, a sealing resin provided over the surface of the wiring board to cover the semiconductor chip, and a low-elasticity resin provided between the wiring board and the sealing resin. The low-elasticity resin is arranged outside of an area on which the semiconductor chip is mounted. The low-elasticity resin has an elastic modulus lower than an elastic modulus of the sealing resin.
    Type: Application
    Filed: July 2, 2013
    Publication date: January 9, 2014
    Inventors: Sensho USAMI, Koji HOSOKAWA
  • Patent number: 8222737
    Abstract: A BGA semiconductor device includes a semiconductor package and a mounting board mounting thereon the semiconductor package, wherein an array of signal electrodes of the semiconductor package and an array of signal electrodes of the mounting board are coupled together via signal bumps. The BGA semiconductor device also includes a dummy bump, which reinforces the bending strength of the BGA semiconductor device and is broken by a shearing force caused by thermal expansion to alleviate the stress for the signal bumps.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: July 17, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Yuji Watanabe, Hisashi Tanie, Koji Hosokawa, Mitsuaki Katagiri, Ichiro Anjo
  • Patent number: 8164186
    Abstract: A BGA semiconductor device includes a semiconductor package and a mounting board mounting thereon the semiconductor package, wherein an array of signal electrodes of the semiconductor package and an array of signal electrodes of the mounting board are coupled together via signal bumps. The BGA semiconductor device also includes a dummy bump, which reinforces the bending strength of the BGA semiconductor device and is broken by a shearing force caused by thermal expansion to alleviate the stress for the signal bumps.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: April 24, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Yuji Watanabe, Hisashi Tanie, Koji Hosokawa, Mitsuaki Katagiri, Ichiro Anjo
  • Publication number: 20120020041
    Abstract: A device includes a wiring board, an element mounted on the wiring board, a spacer member intervening between the wiring board and the element to form a space therebetween, and an encapsulation body filling the space and encapsulating the element on the wiring board.
    Type: Application
    Filed: July 12, 2011
    Publication date: January 26, 2012
    Applicant: ELPIDA MEMORY, INC
    Inventor: Koji HOSOKAWA