Patents by Inventor Koji Imayoshi

Koji Imayoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11081368
    Abstract: The method of dicing a wiring substrate that includes a core substrate having a front surface and a rear surface at least one of which is provided with an adhesive layer and a rim pattern thereon. The adhesive layer is provided with a laminate that has wiring layers and insulating layers, laminating. The rim pattern is provided with the insulating layers laminated thereon. The method includes steps of forming separation grooves by removing portions of the insulating layers laminated on the rim pattern to expose the rim pattern; exposing at least one of the front and rear surfaces of the core substrate by dissolving and removing the rim pattern of the groove bottoms; and dicing the core substrate exposed at groove bottoms, along cutting margins each being smaller than a groove width of each of the groove bottoms.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: August 3, 2021
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Koji Imayoshi, Yuki Nitta
  • Patent number: 11006516
    Abstract: A glass wiring board is provided with an analog duplexer including an inductor and a capacitor, and includes: a core wiring board provided with the coil-shaped inductor having through electrodes and wiring patterns provided in a glass substrate via an inorganic adhesive layer, and with a land pattern connected to an outer layer; the capacitor having a structure with a dielectric layer sandwiched between upper and lower electrode patterns on an insulating resin layer covering the core wiring board; and a wiring pattern for connecting to an external component such as an external substrate.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: May 11, 2021
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Koji Imayoshi
  • Patent number: 10790209
    Abstract: A wiring circuit substrate includes a glass base, insulating resin layers, wire groups, a first inorganic adhesive layer, a through electrode, and second conductive layers. The glass base has a through-hole. The insulating resin layers are laminated to the glass base and each have a conductive via formed therein. The wire groups are laminated to the insulating resin layers. The first inorganic adhesive layer is laminated to the inner surface of the through-hole. The through electrode is formed of a first conductive layer laminated to the first inorganic adhesive layer. The second conductive layers are formed on the through electrode and the glass base and electrically connected to the upper and lower ends of the through electrode. The glass base has a surface roughness Ra of 100 nm or less, and the second conductive layers each have an amount of dishing of 5 ?m or less above the through electrode.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: September 29, 2020
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Koji Imayoshi
  • Publication number: 20200275548
    Abstract: A glass wiring board is provided with an analog duplexer including an inductor and a capacitor, and includes: a core wiring board provided with the coil-shaped inductor having through electrodes and wiring patterns provided in a glass substrate via an inorganic adhesive layer, and with a land pattern connected to an outer layer; the capacitor having a structure with a dielectric layer sandwiched between upper and lower electrode patterns on an insulating resin layer covering the core wiring board; and a wiring pattern for connecting to an external component such as an external substrate.
    Type: Application
    Filed: May 12, 2020
    Publication date: August 27, 2020
    Applicant: TOPPAN PRINTING CO.,LTD.
    Inventor: Koji IMAYOSHI
  • Publication number: 20200266077
    Abstract: The method of dicing a wiring substrate that includes a core substrate having a front surface and a rear surface at least one of which is provided with an adhesive layer and a rim pattern thereon. The adhesive layer is provided with a laminate that has wiring layers and insulating layers, laminating. The rim pattern is provided with the insulating layers laminated thereon. The method includes steps of forming separation grooves by removing portions of the insulating layers laminated on the rim pattern to expose the rim pattern; exposing at least one of the front and rear surfaces of the core substrate by dissolving and removing the rim pattern of the groove bottoms; and dicing the core substrate exposed at groove bottoms, along cutting margins each being smaller than a groove width of each of the groove bottoms.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Koji Imayoshi, Yuki Nitta
  • Patent number: 10679865
    Abstract: The method of dicing a wiring substrate that includes a core substrate having a front surface and a rear surface at least one of which is provided with an adhesive layer and a rim pattern thereon. The adhesive layer is provided with a laminate that has wiring layers and insulating layers, laminating. The rim pattern is provided with the insulating layers laminated thereon. The method includes steps of forming separation grooves by removing portions of the insulating layers laminated on the rim pattern to expose the rim pattern; exposing at least one of the front and rear surfaces of the core substrate by dissolving and removing the rim pattern of the groove bottoms; and dicing the core substrate exposed at groove bottoms, along cutting margins each being smaller than a groove width of each of the groove bottoms.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: June 9, 2020
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Koji Imayoshi, Yuki Nitta
  • Publication number: 20190304804
    Abstract: The method of dicing a wiring substrate that includes a core substrate having a front surface and a rear surface at least one of which is provided with an adhesive layer and a rim pattern thereon. The adhesive layer is provided with a laminate that has wiring layers and insulating layers, laminating. The rim pattern is provided with the insulating layers laminated thereon. The method includes steps of forming separation grooves by removing portions of the insulating layers laminated on the rim pattern to expose the rim pattern; exposing at least one of the front and rear surfaces of the core substrate by dissolving and removing the rim pattern of the groove bottoms; and dicing the core substrate exposed at groove bottoms, along cutting margins each being smaller than a groove width of each of the groove bottoms.
    Type: Application
    Filed: June 19, 2019
    Publication date: October 3, 2019
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Koji IMAYOSHI, Yuki NITTA
  • Patent number: 10056322
    Abstract: An interposer which can better prevent detachment of a conductive layer pattern due to thermal expansion and thermal contraction. The interposer includes a substrate having a through hole; an insulative resin layer formed on a surface of the substrate and including a conductive via; a wiring layer disposed on the substrate with the insulative resin layer interposed therebetween; an inorganic adhesive layer formed only on a side surface of the through hole; and a through electrode filled in a connection hole which is formed by the inorganic adhesive layer in the through hole so as to penetrate between both surfaces of the substrate, wherein the through electrode is electrically connected to the wiring layer via the conductive via, and a thermal expansion coefficient of the inorganic adhesive layer is larger than a thermal expansion coefficient of the substrate and smaller than a thermal expansion coefficient of the through electrode.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: August 21, 2018
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventors: Koji Imayoshi, Syuji Kiuchi
  • Publication number: 20180166354
    Abstract: A wiring circuit substrate includes a glass base, insulating resin layers, wire groups, a first inorganic adhesive layer, a through electrode, and second conductive layers. The glass base has a through-hole. The insulating resin layers are laminated to the glass base and each have a conductive via formed therein. The wire groups are laminated to the insulating resin layers. The first inorganic adhesive layer is laminated to the inner surface of the through-hole. The through electrode is formed of a first conductive layer laminated to the first inorganic adhesive layer. The second conductive layers are formed on the through electrode and the glass base and electrically connected to the upper and lower ends of the through electrode. The glass base has a surface roughness Ra of 100 nm or less, and the second conductive layers each have an amount of dishing of 5 ?m or less above the through electrode.
    Type: Application
    Filed: December 8, 2017
    Publication date: June 14, 2018
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Koji IMAYOSHI
  • Publication number: 20170250141
    Abstract: A wiring circuit board is provided which can dissipate some heat generated by the driving of a semiconductor element due to thermal conduction to help control temperature rise of the semiconductor element to be an allowable temperature or less, thereby ensuring higher reliability The wiring circuit board includes a base material having a through hole, an insulative resin layer laminated on the base material and having a conductive via formed therein, and a wiring group laminated on the insulative resin layer, wherein an inorganic adhesive layer is formed in the through hole, a hollow through electrode is formed by laminating a conductive layer on the inorganic adhesive layer, a filling resin with higher thermal conductivity than that of the base material is filled in the through electrode, and upper and lower ends of the through electrode are covered with a conductive layer.
    Type: Application
    Filed: May 12, 2017
    Publication date: August 31, 2017
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Koji IMAYOSHI
  • Publication number: 20170018492
    Abstract: An interposer which can better prevent detachment of a conductive layer pattern due to thermal expansion and thermal contraction. The interposer includes a substrate having a through hole; an insulative resin layer formed on a surface of the substrate and including a conductive via; a wiring layer disposed on the substrate with the insulative resin layer interposed therebetween; an inorganic adhesive layer formed only on a side surface of the through hole; and a through electrode filled in a connection hole which is formed by the inorganic adhesive layer in the through hole so as to penetrate between both surfaces of the substrate, wherein the through electrode is electrically connected to the wiring layer via the conductive via, and a thermal expansion coefficient of the inorganic adhesive layer is larger than a thermal expansion coefficient of the substrate and smaller than a thermal expansion coefficient of the through electrode.
    Type: Application
    Filed: September 28, 2016
    Publication date: January 19, 2017
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventors: Koji IMAYOSHI, Syuji KIUCHI
  • Patent number: 6483562
    Abstract: An electrode substrate for a reflection type liquid crystal display device, which includes a substrate, and a light scattering film formed on the substrate and including a transparent matrix resin and scattering particles made of a resin. The light scattering film is formed from a coating liquid containing the transparent matrix resin and a resin for forming the scattering particles, which has a different refractive index from that of the matrix resin, both mixed in a solvent. The scattering particles are dispersed in the transparent matrix resin as a result of a phase separation due to the low compatibility between these resins as the solvent is evaporated from the coating liquid. The size and dispersed state of the scattering particles are at least two-dimensionally randomized as viewed from the front of the light scattering film.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: November 19, 2002
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Kenzo Fukuyoshi, Koji Imayoshi, Satoshi Kitamura
  • Publication number: 20010026120
    Abstract: An electrode plate for display device includes a substrate and a multi-layered conductive film. The multi-layered conductive film includes a lower side amorphous oxide layer, a silver-based layer, and an upper side amorphous oxide layer. The lower side amorphous oxide layer and the upper side amorphous oxide layer are formed of an amorphous and amorphous-like material. The film thickness of the upper side amorphous oxide layer is not larger than 20 nm.
    Type: Application
    Filed: April 30, 2001
    Publication date: October 4, 2001
    Inventors: Kenzo Fukuyoshi, Yukihiro Kimura, Koji Imayoshi
  • Patent number: 6249082
    Abstract: An electrode plate for display device includes a substrate and a multi-layered conductive film. The multi-layered conductive film includes a lower side amorphous oxide layer, a silver-based layer, and an upper side amorphous oxide layer. The lower side amorphous oxide layer and the upper side amorphous oxide layer are formed of an amorphous and amorphous-like material. The film thickness of the upper side amorphous oxide layer is not larger than 20 nm.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: June 19, 2001
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Kenzo Fukuyoshi, Yukihiro Kimura, Koji Imayoshi
  • Patent number: 5667853
    Abstract: A multilayered conductive film has a silver-based layer formed of a silver-based metallic material. A first transparent oxide layer is provided on one surface of the silver-based layer, and a second transparent oxide layer is provided on the other surface of the silver-based layer. The first and second transparent oxide layers are independently formed of a compound oxide material of indium oxide with at least one secondary metal oxide whose metallic element has substantially no solid solubility in silver.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: September 16, 1997
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Kenzo Fukuyoshi, Yukihiro Kimura, Koji Imayoshi, Osamu Koga, Katsunori Horachi