Patents by Inventor Koji Kishi
Koji Kishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080094905Abstract: A nonvolatile memory includes circuits each having first control transistors, memory transistors, second control transistors and memory transistors repeatedly connected in series in sequence. Inversion layers are formed in the direction intersecting the serial direction with turning on of the control transistors. A selection circuit selects a connection of the inversion layer placed under the first control transistor and its corresponding read/write circuit. The control transistors placed on both sides adjacent to the memory transistor are turned on to perform reading. The first control transistors placed on both sides of the second control transistor as viewed from side to side are turned on to perform writing into the other of the right and left memory transistors via one of the right and left memory transistors. The selection circuit connects the read/write circuit and the inversion layer in such a manner that the same read/write circuit is used in reading and writing for the same memory transistor.Type: ApplicationFiled: December 7, 2007Publication date: April 24, 2008Inventors: Koji Kishi, Hideaki Kurata, Satoshi Noda, Yusuke Jono
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Patent number: 7324388Abstract: A nonvolatile memory includes circuits each having first control transistors, memory transistors, second control transistors and memory transistors repeatedly connected in series in sequence. Inversion layers are formed in the direction intersecting the serial direction with turning on of the control transistors. A selection circuit selects a connection of the inversion layer placed under the first control transistor and its corresponding read/write circuit. The control transistors placed on both sides adjacent to the memory transistor are turned on to perform reading. The first control transistors placed on both sides of the second control transistor as viewed from side to side are turned on to perform writing into the other of the right and left memory transistors via one of the right and left memory transistors. The selection circuit connects the read/write circuit and the inversion layer in such a manner that the same read/write circuit is used in reading and writing for the same memory transistor.Type: GrantFiled: July 27, 2005Date of Patent: January 29, 2008Assignee: Renesas Technology Corp.Inventors: Koji Kishi, Hideaki Kurata, Satoshi Noda, Yusuke Jono
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Publication number: 20070183239Abstract: A semiconductor memory device includes a plurality of memory mats each including a memory cell storing data, a sense latch portion performing detection of data stored by the memory cell, and a buffer circuit externally outputting read data detected by the sense latch portion. The sense latch portion and the buffer circuit are shared between a plurality of memory mats and are arranged between a plurality of memory mats.Type: ApplicationFiled: January 30, 2007Publication date: August 9, 2007Inventor: Koji Kishi
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Patent number: 7208287Abstract: A method for quantitating a specific component in lipoproteins contained in a biological sample, for example, HDL (high-density lipoprotein), LDL (low-density lipoprotein) or VLDL (very low-density lipoprotein) by using a commonly employed automatic analyzer without centrifuging or making the reaction liquor cloudy due to complexes or aggregates. Namely, a controlling means, whereby an enzyme reaction can be carried out exclusively for the target component, is introduced into a method for enzymatically assaying a component in a specific lipoprotein fraction in the serum, thereby specifically assaying the component.Type: GrantFiled: February 11, 2004Date of Patent: April 24, 2007Assignee: Sysmex CorporationInventors: Koji Kishi, Tsutomu Kakuyama, Koji Ochiai, Yuzo Hasegawa
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Patent number: 7148063Abstract: The object of the present invention is to provide a method for more accurately assaying the enzyme activities of mCK isozymes and a method for separately assaying the enzyme activities of CK isozymes by separately assaying the enzyme activities of ubiquitous mCK (umCK) and sarcomeric mCK (smCK). The above object is attained by an assay using an antibody that specifically recognizes umCK protein. In addition, other anti-mCK antibodies (e.g., anti-smCK antibody) and/or anti-human CK-M-inhibiting antibody can also be used. The above antibody is a polyclonal antibody or a monoclonal antibody. As a result of these antibodies, a monoclonal antibody (U1-1881) that is capable of specifically recognizing human umCK and is produced by a hybridoma having a deposition number of FERM BP-8342 is provided.Type: GrantFiled: April 29, 2003Date of Patent: December 12, 2006Assignee: Sysmex CorporationInventors: Yasushi Shirahase, Tadahiro Kajita, Koji Kishi, Kazuaki Yamashita
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Patent number: 7015090Abstract: At least not less than one capacitor formation trench providing an uneven surface is formed on the surface of a capacitor formation region. Thus, the surface area of a capacitor is increased, which enables improvement of the capacitance of the capacitor per unit area. Further, by forming the capacitor formation trench and an element formation trench that are formed in the surface of the semiconductor substrate by the same step, it is possible to simplify the manufacturing process. Whereas, a dielectric film of the capacitor in the capacitor formation region and a high-voltage gate insulating film in a MISFET formation region are formed by the same step; alternatively, the dielectric film of the capacitor in the capacitor formation region and a memory gate interlayer film between a polysilicon layer and a polysilicon layer in the memory cell formation region are formed by the same step.Type: GrantFiled: April 8, 2003Date of Patent: March 21, 2006Assignee: Renesas Technology Corp.Inventors: Tsutomu Okazaki, Daisuke Okada, Yoshihiro Ikeda, Keisuke Tsukamoto, Tatsuya Fukumura, Shoji Shukuri, Keiichi Haraguchi, Koji Kishi
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Publication number: 20060033141Abstract: At least not less than one capacitor formation trench providing an uneven surface is formed on the surface of a capacitor formation region. Thus, the surface area of a capacitor is increased, which enables improvement of the capacitance of the capacitor is increased, which enables improvement of the capacitance of the capacitor per unit area. Further, by forming the capacitor formation trench and an element formation trench that are formed in the surface of the semiconductor substrate by the same step, it is possible to simplify the manufacturing process. Whereas, a dielectric film of the capacitor in the capacitor formation region and a high-voltage insulating film in a MISFET formation region are formed by the same step; alternatively, the dielectric of the capacitor in the capacitor formation region and a memory gate interlayer film between a polysilicon layer and a polysilicon layer in the memory cell formation region are formed by the same step.Type: ApplicationFiled: October 13, 2005Publication date: February 16, 2006Inventors: Tsutomu Okazaki, Daisuke Okada, Yoshihiro Ikeda, Keisuke Tsukamoto, Tatsuya Fukumura, Shoji Shukuri, Keiichi Haraguchi, Koji Kishi
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Publication number: 20060023515Abstract: A nonvolatile memory includes circuits each having first control transistors, memory transistors, second control transistors and memory transistors repeatedly connected in series in sequence. Inversion layers are formed in the direction intersecting the serial direction with turning on of the control transistors. A selection circuit selects a connection of the inversion layer placed under the first control transistor and its corresponding read/write circuit. The control transistors placed on both sides adjacent to the memory transistor are turned on to perform reading. The first control transistors placed on both sides of the second control transistor as viewed from side to side are turned on to perform writing into the other of the right and left memory transistors via one of the right and left memory transistors. The selection circuit connects the read/write circuit and the inversion layer in such a manner that the same read/write circuit is used in reading and writing for the same memory transistor.Type: ApplicationFiled: July 27, 2005Publication date: February 2, 2006Inventors: Koji Kishi, Hideaki Kurata, Satoshi Noda, Yusuke Jono
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Patent number: 6986998Abstract: There is provided a method for a selective assay of component, particularly cholesterol, in very low-density lipoprotein (VLDL) which is one of serum lipoproteins. In the assay, an enzymatic reaction of lipoprotein lipase (LPL) or cholesterol esterase (CE) which well reacts with high-density lipoprotein (HDL) and VLDL is carried out at least in the presence of calixarene or a salt thereof. It is also carried out in the presence of one or more substance(s) selected from albumin and basic amino acids in addition to calixarene or a salt thereof.Type: GrantFiled: June 5, 2001Date of Patent: January 17, 2006Assignee: International Reagents CorporationInventors: Koji Kishi, Tsutomu Kakuyama, Koji Ochiai
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Patent number: 6845429Abstract: The conventional multi-port cache memory, which is formed by using multi-port cells, is excellent in its operating speed. However, the integration area of the constituent multi-port cells is increased in proportion to the square of the number of ports. Thus, if it is intended to decrease the cache miss probability by increasing the storage capacity, the chip size is increased correspondingly, which increases the manufacturing cost. On the other hand, the multi-port cache memory of the present invention is formed by using, as constituents, one-port cell blocks adapted for a large storage capacity, making it possible to easily provide a multi-port cache memory of a large storage capacity and reduced integration area, which has a large random access bandwidth, is capable of parallel access from a plurality of ports, and is adapted for use in advanced microprocessors having a small cache miss probability.Type: GrantFiled: August 2, 2001Date of Patent: January 18, 2005Assignee: President of Hiroshima UniversityInventors: Hans Jurgen Mattausch, Koji Kishi, Nobuhiko Omori
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Publication number: 20040161811Abstract: A method for quantitating a specific component in lipoproteins contained in a biological sample, for example, HDL (high-density lipoprotein), LDL (low-density lipoprotein) or VLDL (very low-density lipoprotein) by using a commonly employed automatic analyzer without centrifuging or making the reaction liquor cloudy due to complexes or aggregates. Namely, a controlling means, whereby an enzyme reaction can be carried out exclusively for the target component, is introduced into a method for enzymatically assaying a component in a specific lipoprotein fraction in the serum, thereby specifically assaying the component.Type: ApplicationFiled: February 11, 2004Publication date: August 19, 2004Inventors: Koji Kishi, Tsutomu Kakuyama, Koji Ochiai, Yuzo Hasegawa
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Publication number: 20040038492Abstract: The present invention provides a technology which allows the improvement of the capacitor capacitance per unit area, and a technology which allows the simplification of a manufacturing process associated therewith. At least not less than one capacitor formation trench causing the uneven surface is formed on the surface of a capacitor formation region. As a result, the surface area of a capacitor is increased, which enables the improvement of the capacitance of the capacitor per unit area. Further, by forming the capacitor formation trench and an element formation trench formed in the surface of the semiconductor substrate are formed by the same step. As a result, it is possible to simplify the manufacturing process. Whereas, a dielectric film of the capacitor in the capacitor formation region and a high-voltage gate insulating film in a MISFET formation region are formed by the same step.Type: ApplicationFiled: April 8, 2003Publication date: February 26, 2004Inventors: Tsutomu Okazaki, Daisuke Okada, Yoshihiro Ikeda, Keisuke Tsukamoto, Tatsuya Fukumura, Shoji Shukuri, Keiichi Haraguchi, Koji Kishi
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Publication number: 20030228316Abstract: The object of the present invention is to provide a method for more accurately assaying the enzyme activities of mCK isozymes and a method for separately assaying the enzyme activities of CK isozymes by separately assaying the enzyme activities of ubiquitous mCK (umCK) and sarcomeric mCK (smCK).Type: ApplicationFiled: April 29, 2003Publication date: December 11, 2003Applicant: INTERNATIONAL REAGENTS CORPORATIONInventors: Yasushi Shirahase, Tadahiro Kajita, Koji Kishi, Kazuaki Yamashita
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Publication number: 20030129681Abstract: There is provided a method for a selective assay of component, particularly cholesterol, in very low-density lipoprotein (VLDL) which is one of serum lipoproteins.Type: ApplicationFiled: December 3, 2002Publication date: July 10, 2003Inventors: Koji Kishi, Tsutomu Kakuyama, Koji Ochiai
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Publication number: 20020194085Abstract: A store apparatus determines the number of points given to a customer who has purchased a commodity using a customer apparatus via the Internet, in which the number of points are determined based on a roulette game. Since the point value given to the customer who purchases the commodity is determined by the roulette game regardless of the cost of the commodity purchased, the specific time period when purchased or the specific commodity purchased, it is possible to keep the willingness of the customer to purchase commodities and to direct that willingness to all commodities. In addition, since the customer can acquire higher points than the points usually given depending on the result of the roulette game, it is possible to further rouse the willingness of the customer to purchase commodities. Further, the customer is capable of shopping with more fun.Type: ApplicationFiled: June 6, 2002Publication date: December 19, 2002Applicant: Sony Computer Entertainment Inc.Inventors: Hitoshi Kageyama, Toru Kuwahara, Koji Kishi, Tetsuya Iida
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Publication number: 20020019912Abstract: The conventional multi-port cache memory, which is formed by using multi-port cell blocks, is excellent in its operating speed. However, the integration area of the constituent multi-port cell blocks is increased in proportion to the square of the number of ports. Thus, if it is intended to decrease the cache miss probability by increasing the storage capacity, the chip size is increased correspondingly, which increases the manufacturing cost. On the other hand, the multi-port cache memory of the present invention is formed by using, as constituents, one-port cell blocks adapted for a large storage capacity, making it possible to easily provide a multi-port cache memory of a large storage capacity and reduced integration area, which has a large random access bandwidth, is capable of parallel access from a plurality of ports, and is adapted for use in advanced microprocessors having a small cache miss probability.Type: ApplicationFiled: August 2, 2001Publication date: February 14, 2002Inventors: Hans Jurgen Mattausch, Koji Kishi, Nobuhiko Omori
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Patent number: 6114134Abstract: A method for assaying biological specimens for substances contained in the components of each specimen by the use of one or more kinds of calixarenes; and a reagent comprising one or more kinds of calixarenes. The method utilizes complexes formed by calixarenes and the components of biological specimens, and makes it possible to assay biological specimens for substances contained in the components of each specimen, for example, for cholesterol contained in high-density lipoprotein (HDL), without preliminary separation from the other components of the biological specimen. The method can be conducted by easy and simple operations and lessen measurement errors or problems caused by man, and permits continuous measurement with general-purpose automatic analyzing apparatuses and multi-channel measurement together with other test items.Type: GrantFiled: December 2, 1999Date of Patent: September 5, 2000Assignee: International Reagents CorporationInventors: Koji Kishi, Tsutomu Kakuyama, Yasushi Shirahase, Yoshifumi Watazu
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Patent number: 5250416Abstract: The present invention relates to a method for determining a slight amount of NADH or XTP which is present in a solution, with high sensitivity by the use of an NADH kinase specific for NADH by utilizing a cycling reaction, and this method permits highly sensitive determination of NADH without any influence of NAD.sup.+ and hence is useful for diagnoses of diseases and the like.Type: GrantFiled: January 21, 1992Date of Patent: October 5, 1993Assignees: Noda Institute for Scientific Rsearch, International Reagents Corp.Inventors: Tsuyoshi Ohno, Masaru Suzuki, Tatsuo Horiuchi, Yasushi Shirahase, Koji Kishi, Yoshifumi Watazu