Abstract: A high density plasma enhanced chemical vapor deposition method for depositing a silicon dioxide film on a silicon region includes at least both a first deposition period during which a first power having a first frequency is applied to the silicon region and a second deposition period during which a second power having a second frequency which is lower than the first frequency is applied to the silicon region to form an Si/SiO2 interface free from an interface state.

Abstract: The present invention is directed to a process for manufacturing a semiconductor device. It includes a step for forming a fine wiring, and provides a process for uniformly and positively forming a film of a barrier metal, such as tantalum, for preventing the metal, such as copper, which becomes the first material for the wiring, from diffusing into a silicon oxide film. The process involves depositing an oxide of a barrier metal on a substrate which is formed with a via hole by a process such as CVD process. A high quality barrier metal film is formed by reducing the oxide by applying a negative potential to the oxide in a solution in which hydrogen ions are present. Subsequently an embedded wiring is formed by embedding the main metal by a plating process and the like and polishing to remove unnecessary portions.

Abstract: A multilevel interconnecting structure includes a plurality of interconnecting layers formed on a semiconductor substrate, a fluorine-doped oxide film for burying portions between the interconnecting layers, and an oxide film formed on the fluorine-doped oxide film, having a planarized surface, and not containing fluorine. A method of forming the multilevel interconnecting structure is also disclosed.

Abstract: A method for making a semiconductor device which has the steps of: (A) forming insulating film on a semiconductor substrate and then a plurality of lower wirings on the insulating film; (B) forming first insulating film with an overhang form to cover the surface of the lower wirings and the insulating film by using a plasma enhanced chemical vapor deposition method; (C) forming organic-included coating insulating film on the first insulating film by using a rotational coating method, (D) baking the organic-included coating insulating film; (E) etching back a part of the organic-included coating insulating film by using a dry-etching method; (F) forming second insulating film on the first insulating film and the organic-included coating insulating film by using the plasma enhanced chemical vapor deposition method; (G) polishing the second insulating film by using a chemical mechanical polishing method to planarize the surface, (H) etching a predetermined part of the first insulating film and the second insulat

Abstract: A multilevel interconnecting structure includes a plurality of interconnecting layers formed on a semiconductor substrate, a fluorine-doped oxide film for burying portions between the interconnecting layers, and an oxide film formed on the fluorine-doped oxide film, having a planarized surface, and not containing fluorine. A method of forming the multilevel interconnecting structure is also disclosed.

Abstract: A semiconductor device with satisfactory bonding avility of a plasma SiOF oxide layer on a wiring and satisfactory burying ability for buring wiring space portions. The semiconductor device is deposited by forming a metal layer to be a base of wiring on a semiconductor substrate, forming an anti-reflection layer of a refractory metal or compound thereof, on the metal layer, and forming an insulation layer on the anti-reflection layer. There after, the insulation layer is patterned and a wiring is patterned by etching the anti-reflection layer and the metal layer to be the base of the wiring with taking the patterned insulation layer as a mask with leasing the anti-reflection layer and the insulation layer on the wiring. Subsequently, the patterned wiring is buried with an SiOF layer as an Si oxide layer containing fluorine, together with the anti-reflection layer and the insulation layer on the upper surface.

Abstract: A multi-layer interconnection structure in a semiconductor device has a interlevel dielectric layer of three SiO.sub.2 films. The first SiO.sub.2 film has a small thickness not lower than 25 nm and is formed by a dual-frequency plasma enhanced CVD process using alkoxysilane as a reactive gas. The second SiO.sub.2 film has a large thickness ranging between 300 and 800 nm and is formed on the first SiO.sub.2 film by an atmospheric pressure CVD process using a mixture of alkoxysilane and ozone as a reactive gas. The third SiO.sub.2 film has a thickness of 50 nm and is flattened by an etch-back process of the same together with an overlying sacrificial spin-on glass film. A second layer interconnect pattern is formed on or above the flattened third SiO.sub.2 film with an excellent reliability.

Abstract: There is provided a method of fabricating a semiconductor device, including the steps of forming lower wiring layers on a semiconductor substrate, forming a first silicon oxide film by PECVD, forming a second silicon oxide film containing fluorine by PECVD so that the second silicon oxide film covers the first silicon oxide film and further so that portions thereof formed between the lower wiring layers have a top surface lower than a top surface of portions of the first silicon oxide film located on the lower wiring layers, forming a third silicon oxide film by PECVD so that the third silicon oxide film covers the second silicon oxide film and further so that portions of the third silicon film formed between the lower wiring layers have a top surface higher than a top surface of portions of the first silicon oxide film located on the lower wiring layers, the second silicon oxide film having a greater polishing rate than polishing rates of the first and third silicon oxide films, chemically and mechanically p

Abstract: Disclosed is a method of manufacturing a semiconductor device aimed at improving reliability of wiring, more particularly, of a via hole when a silicon oxide film formed by a high density plasma CVD process is used as an inter-level dielectric film in an integrated circuit having a multi-level wiring structure. When the multi-level wiring structure is formed on a semiconductor substrate, after underlying wiring is formed, a silicon oxide film is formed on the entire surface of the substrate by a high density plasma CVD process, and heat treated in inert gas or oxygen atmosphere at a temperature of 300.degree. C. or more but 500.degree. C. or less for 10 minutes or more. Excess hygrogen incorporated in the silicon oxide during the CVD process is removed by the above heat treatment. Subsequently, via holes are opened, and upper wiring is formed.

Abstract: A method for fabricating a semiconductor device on a silicon substrate comprises the step of high-frequency plasma-treatment for through-hole before filling the through-hole with a metallic layer for connection. The plasma contains argon, oxygen and hydrogen atoms wherein the ratio of oxygen atoms to the total of the oxygen and hydrogen atoms in number is between 1/3 and 1/100. The silicon substrate is applied with a high-frequency bias voltage during the plasma treatment for acceleration of argon ion.

Abstract: A semiconductor device comprising an insulating film at least partially containing a fluorine-containing film, formed above a semiconductor substrate, and a titanium nitride film formed on the insulating film. The above titanium film functions as a barrier metal film for barriering the diffusion of fluorine (F) atoms.

Abstract: A spin on glass composition which includes in a solvent as a main component alkoxysilane represented by H.sub.n Si(OR).sub.4-n, where n is 1, 2, or 3 and R is an alkyl group. Water or alcohol is available as a solvent. It is preferable to add the above alkoxysilane with at least any one of a phosphorus compound, boron compound and a germanium compound. It is also preferable to add the above alkoxysilane not only with tetraalkoxysilane Si(OR).sub.4, where R is an alkyl group, but also with at least any one of phosphorus compound, boron compound and germanium compound.

Abstract: A method of manufacturing a semiconductor device includes the following steps. A lower wiring layer is formed on a semiconductor substrate through an insulating film. A compound gas having a catalysis for promoting formation of silicon oxide is added in an atmosphere using a main component gas consisting of ozone, water vapor, and one of alkoxysilane and organosiloxane as a source gas to form a silicon oxide film by a chemical vapor deposition (CVD) method directly on a surface of the semiconductor substrate on which the lower wiring layer is formed. An upper wiring layer is formed on the silicon oxide film.

Abstract: After forming lower level wiring and plasma oxide layer, SOG film is applied by applying a solution containing hydrogen silsesquioxane as primary component under rotation. Pre-baking of the SOG film is performed by a first heat treatment and causes reflow thereof by a second heat treatment at a temperature higher than the first heat treatment. Subsequently, another plasma oxide layer is formed. By this, in an interlayer insulation layer including SOG film, occurrence of crack and so forth can be prevented and water resistance can be improved.

Abstract: An oil injection type screw compressor includes an oil passage for circulating lubricating oil extending from an oil separator disposed in a discharge passage of a compressor main body through an oil cooler, oil filter and oil pump on the downstream side of the oil pump to parts requiring lubricating oil such as rotors, bearings, shaft sealing members within the compressor main body, the compressor comprising pressure switches for detecting a pressure of a suction passage as a low pressure side, and a pressure of the oil passage between the oil filter and the oil pump as a high pressure side, whereby starting the oil pump when the differential pressure between both the detected pressures is not more than the specified value.

Abstract: An optical connector comprising a first housing for supporting a ferrule, a second housing having a ferrule holder into which the ferrule is inserted with a predetermined frictional resistance, a spring member for elastically pushing the ferrule into the ferrule holder against the frictional resistance at the time that load as the ferrule is brought into contact with the ferrule holder at a first predetermined stroke position has reached a first predetermined threshold value, and a pair of locking members contacting each other at a second predetermined stroke position, and when load of the contact at the second stroke position has reached a second predetermined threshold value, the contact at the second stroke position being released and then the first housing being further moved in the predetermined direction and the locking members being engaged with each other, wherein the second stroke position is set with respect to the first stroke position so that the locking members can contact each other prior to the

Abstract: Disclosed herein is a fiber treating process which comprises treating fibers.An ester formed by the union of an polybasic carboxylic acid and a compound represented by the formula below ##STR1## where R.sub.1 and R.sub.2 represent C.sub.4 -C.sub.18 alkyl groups; AO represents a C.sub.2 -C.sub.4 alkyleneoxide group; and n represents an integer of 0 to 30.

Abstract: A residual fuel oil is improved in dispersion stability when a large amount of sludge is contained therein and comprises (1) a thermal cracking oil, (2) a diluent and (3) a dispersant selected from the group consisting of (A) an imidazoline derivative containing a hydrocarbon group having 7 to 23 carbon atoms, (B) a hydrolysis product of (A), (C) a reaction product of an aliphatic acid having 8 to 22 carbon atoms and a polyalkylenepolyamine having 4 to 6 amino groups, (D) a monoamine containing a hydrocarbon group having 8 to 22 carbon atoms, (E) a polyamine containing a hydrocarbon group having 8 to 22 carbon atoms, (F) an etheramine having a long chain hydrocarbon group, (G) a phosphate having a long chain hydrocarbon group, (H) a salt of (G), (I) a dithiophosphate and (J) a salt of (I).