Abstract: A calculation method executed by a computer, the calculation method includes calculating, using a processor, a length of one side of a second module based on an area of the second module that is included in a first module in a circuit and includes devices; and calculating, using the processor, a length of a wiring of the first module based on the calculated length and the number of fan-outs of the first module.

Abstract: A wiring inspection apparatus includes a first calculating unit, a second calculating unit, and an output unit. The first calculating unit calculates the number of components arranged along two sides, one of which extends in a first direction and the other one of which extends in a second direction, of a minimum rectangle including a transmission component and a reception component. The second calculating unit calculates the number of the components arranged along the two sides at a predetermined arrangement density of relay components. When the number of the relay components is greater than the number of the components calculated by the second calculating unit, the output unit outputs information indicating the presence of a wiring extending in a direction opposite to a direction from the transmission component to the reception component among wirings connecting the transmission component, the reception component, and the relay components.

Abstract: A wiring inspection apparatus includes a dividing unit, a calculating unit, and an output unit. The dividing unit draws a boundary line in a predetermined area between a transmission component and a reception component, to divide the predetermined area into a first area containing the transmission component and a second area containing the reception component. The transmission component transmits a signal to the reception component via relay components. The calculating unit calculates a number of wirings that connect the components across the boundary line, based on positions of the transmission component, the reception component, and the relay components in the predetermined area. The output unit outputs information indicating the presence of a wiring extending in a direction opposite to a direction from the transmission component to the reception component, when the number of the wirings calculated by the calculating unit is equal to or greater than a predetermined value.

Abstract: A semiconductor device includes a delay part configured to assign a delay to an input signal, a phase detector configured to detect a phase of an output signal output from the delay part, a setting part configured to set a stable operations range of the phase of the output signal based on phase information output from the phase detector, and an error detector configured to set an acceptable range corresponding to the stable operations range, determine whether a phase of the output signal falls within the acceptable range, and change the acceptable range based on an extraneous factor of an input signal of the delay part.

Abstract: A wiring inspection apparatus includes a first calculating unit, a second calculating unit, and an output unit. The first calculating unit calculates the number of components arranged along two sides, one of which extends in a first direction and the other one of which extends in a second direction, of a minimum rectangle including a transmission component and a reception component. The second calculating unit calculates the number of the components arranged along the two sides at a predetermined arrangement density of relay components. When the number of the relay components is greater than the number of the components calculated by the second calculating unit, the output unit outputs information indicating the presence of a wiring extending in a direction opposite to a direction from the transmission component to the reception component among wirings connecting the transmission component, the reception component, and the relay components.

Abstract: A wiring inspection apparatus includes a dividing unit, a calculating unit, and an output unit. The dividing unit draws a boundary line in a predetermined area between a transmission component and a reception component, to divide the predetermined area into a first area containing the transmission component and a second area containing the reception component. The transmission component transmits a signal to the reception component via relay components. The calculating unit calculates a number of wirings that connect the components across the boundary line, based on positions of the transmission component, the reception component, and the relay components in the predetermined area. The output unit outputs information indicating the presence of a wiring extending in a direction opposite to a direction from the transmission component to the reception component, when the number of the wirings calculated by the calculating unit is equal to or greater than a predetermined value.

Abstract: A semiconductor apparatus includes a delay circuit to apply delay to an input signal, a phase detector to detect a phase of an output signal which is outputted from the delay circuit, a filter to set a range of the phase of the output signal for stable operation based on phase information outputted from the phase detector, a counter to count a number of detections of the output signal when the phase deviates from the range for stable operation, a discount controller to generate a discount signal indicating a discount number for the number counted by the counter, in accordance with an operating condition or an external factor outside the delay circuit and an error detector to determine whether or not an error of the phase of the output signal has occurred based on the number counted by the counter and a discount number indicated by the discount signal.

Abstract: A load control device includes saturable devices, loads, a phase controller, a bypass unit, and a controller. Plural saturable devices are connected in series to each other. Plural loads are respectively connected to the saturable devices and are supplied with power via the saturable devices. The phase controller phase-controls an output voltage of an AC power supply so as to be supplied to the respective loads. The bypass unit can supply a reduced bypass current so as to bypass the phase controller from a zero cross point of each half cycle of an AC power supply voltage. The controller sets an output of the phase controller and controls the output thereof to a set output value, and stops the supply of the bypass current in a condition in which a firing angle (conduction phase) is equal to or more than the predetermined value.

Abstract: An event-driven simulation is performed on an operation of data transmission from a source hardware element to a destination hardware element. Upon receiving a first request for transmitting first data at a first time-point, data stored in a storage area of the destination hardware element is saved as backup data in a memory, and the first data is stored in the storage area. A first time-period for transmitting the first data is measured from the first time-point. When a second request having a higher priority than the first request is received at a second time-point, a portion of the backup data is restored to the storage area so that the storage area stores third data estimated to have been transmitted to the destination hardware element. After a second time-period for the second request is measured, the first data is again stored in the storage area.

Abstract: A semiconductor device includes a delay part configured to assign a delay to an input signal, a phase detector configured to detect a phase of an output signal output from the delay part, a setting part configured to set a stable operations range of the phase of the output signal based on phase information output from the phase detector, and an error detector configured to set an acceptable range corresponding to the stable operations range, determine whether a phase of the output signal falls within the acceptable range, and change the acceptable range based on an extraneous factor of an input signal of the delay part.

Abstract: A semiconductor device including an input terminal to receive an input signal and an output terminal to output an output signal includes delay elements connected in series with the input terminal and each to assign the delay to the input signal input from the input terminal, selectors connected to output sides of the delay elements and each to select one of output signals of the delay elements based on a selection signal for selecting the one of the output signals of the delay elements to return the selected one of the output signals to the output terminal, and delay circuits disposed corresponding to the selectors and each to cause switching of the selection signal input into a corresponding one of the selectors to occur after switching of a signal level of the input signal input into the corresponding one of the selectors serving as a signal turning point.

Abstract: A calculation method executed by a computer, the calculation method includes calculating, using a processor, a length of one side of a second module based on an area of the second module that is included in a first module in a circuit and includes devices; and calculating, using the processor, a length of a wiring of the first module based on the calculated length and the number of fan-outs of the first module.

Abstract: An image forming apparatus includes: an image carrier; an exposure device; a developing device that develops the latent image on the image carrier by using a toner charged to a predetermined polarity and having an external additive; a transfer device that transfers a toner image developed on the image carrier to a transfer medium; a first charging member that charges the external additive and the transfer residual toner remaining on the image carrier and the image carrier after transfer to the same polarity as a polarity of the toner; a cleaning member that electrostatically attracts the external additive and the transfer residual toner charged by the first charging member; and a second charging member that charges the image carrier to an electric potential smaller in absolute value than an electric potential of the image carrier generated after the image carrier passes the cleaning member.

Abstract: A semiconductor apparatus includes a delay circuit to apply delay to an input signal, a phase detector to detect a phase of an output signal which is outputted from the delay circuit, a filter to set a range of the phase of the output signal for stable operation based on phase information outputted from the phase detector, a counter to count a number of detections of the output signal when the phase deviates from the range for stable operation, a discount controller to generate a discount signal indicating a discount number for the number counted by the counter, in accordance with an operating condition or an external factor outside the delay circuit and an error detector to determine whether or not an error of the phase of the output signal has occurred based on the number counted by the counter and a discount number indicated by the discount signal.

Abstract: According to one embodiment of a DC power supply feeding system, the system includes a DC voltage power supply that outputs a specified voltage by using a commercial AC power supply, a varying voltage power supply that generates power by using natural energy and outputs a varying voltage, and a reverse flow preventing elements that connects the DC voltage power supply and the varying voltage power supply in parallel while output sides are made to have same polarity, and supplies powers obtained from the DC voltage power supply and the varying voltage power supply to a load. When an amount of power generation of the varying voltage power supply is small, the power is intermittently supplied to the load.

Abstract: A developing cartridge includes: a developer carrier which carries toner; a toner supply member which supplies the toner to the developer carrier; a regulation member which regulates an amount of toner on the developer carrier; a developing chamber which has the developer carrier and the toner supply member; a transport section which is connected to an upper portion and a lower portion of the developing chamber and transports the toner from the lower portion of the developing chamber to the upper portion of the developing chamber; and a transport member which is disposed inside the transport section and transports the toner while agitating the toner. A capacity of the transport section is larger than a capacity of the developing chamber.

Abstract: A developing device includes: a developer carrier that carries toner thereon; a toner supply member that supplies toner to the developer carrier; a development chamber having the developer carrier and the toner supply member; a replaceable toner cartridge that supplies toner to the development chamber and collects toner from the development chamber; and a contact member that is in contact with the toner supply member to form a nip portion. At the time of replacement to the toner cartridge that contains new toner therein, the new toner is supplied from the toner cartridge into the development chamber and is made to pass through a nip portion between the toner supply member and the contact member within the development chamber, and then nip-passed toner is collected from the development chamber into the toner cartridge.

Abstract: The light source portion is provided with a plurality of LED circuits having a plurality of LEDs. A plurality of drive circuits are provided which cause the LEDs to be lit per LED circuit in response to input of PWM signals. The PWM control circuit outputs PWM signals per drive circuit in response to input of lighting control signals and simultaneously make the output timings of the PWM signals different from each other per drive circuit. By making the output timings of the PWM signals different, the period of time during which the LEDs are turned off can be reduced as the entirety of the light source portion, and the occurrence of flickering is reduced without increasing the lighting frequency.

Abstract: A charger includes: a first charging member that contacts an image carrier and a second charging member that contacts the image carrier downstream from the first charging member. At the time of image formation, a voltage higher than the discharge start voltage of the first charging member is applied to the first charging member and a voltage lower than the discharge start voltage of the second charging member and lower than the voltage applied to the first charging member is applied to the second charging member, and at the time when an image is not formed, a voltage lower than the discharge start voltage of the first charging member is applied to the first charging member and a voltage higher than the discharge start voltage of the second charging member and higher than the voltage applied to the first charging member is applied to the second charging member.

Abstract: An apparatus, method, and program for designing a semiconductor device having a storage unit configured to a differential signal library for use in generation of a design data of a differential signal cell that receives or outputs differential signals. The apparatus includes a logic synthesis unit performing logic synthesis based on the differential signal library configured to the storage unit. The apparatus generates a netlist design data of the differential signal cell that receives or outputs the differential signals.