Patents by Inventor Koji Miyauchi
Koji Miyauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240110969Abstract: Provided is a testing apparatus including: a light emission control unit which causes a plurality of light emitting elements to be tested to emit light; a light measurement unit which receives the light emitted from the plurality of light emitting elements and measures wavelengths of the received light; and a determination unit which determines whether there is an abnormality in at least one light emitting element on the basis of intensity distributions of the wavelengths of the light, which is emitted from the plurality of light emitting elements, measured by the light measurement unit. The testing apparatus may further include: a light source; an optical system which irradiates the plurality of light emitting elements with light emitted from the light source; and an electrical measurement unit which measures a photoelectric signal obtained by each of the plurality of light emitting elements photoelectrically converting the light radiated by the optical system.Type: ApplicationFiled: December 14, 2023Publication date: April 4, 2024Inventors: Kotaro HASEGAWA, Koji MIYAUCHI
-
Publication number: 20240027492Abstract: A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.Type: ApplicationFiled: September 30, 2023Publication date: January 25, 2024Inventors: Karthik Ranganathan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Koji Miyauchi, Keith Schaub, Amit Kucheriya, Kotaro Hasegawa, Yoshiyuki Aoki
-
Patent number: 11821913Abstract: A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.Type: GrantFiled: September 30, 2021Date of Patent: November 21, 2023Assignee: Advantest Test Solutions, Inc.Inventors: Karthik Ranganathan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Koji Miyauchi, Keith Schaub, Amit Kucheriya, Kotaro Hasegawa, Yoshiyuki Aoki
-
Publication number: 20220137092Abstract: A test apparatus comprising a tester interface board (TIB) affixed in a slot of a tester rack, wherein the TIB comprises test circuitry and a plurality of sockets, each socket operable to receive a device under test (DUT). The test apparatus further comprises a carrier comprising an array of DUTs, wherein the carrier is operable to slide into the slot of the tester rack, and wherein each DUT in the array of DUTs aligns with a respective socket on the TIB. Further, the test apparatus comprises a plurality of socket covers, wherein each socket cover of the plurality of socket covers is operable to actuate a top portion of each DUT of the array of DUTs in the carrier.Type: ApplicationFiled: September 30, 2021Publication date: May 5, 2022Inventors: Karthik Ranganathan, Samer Kabbani, Gilberto Oseguera, Ira Leventhal, Koji Miyauchi, Keith Schaub, Amit Kucheriya, Kotaro Hasegawa, Yoshiyuki Aoki
-
Patent number: 11137446Abstract: A test apparatus is configured to test a DUT that does not support synchronous control from an external circuit. A main controller is configured based on an architecture that tests a device by synchronous control with the main controller itself as the master. A MIU is configured as an interface between the main controller and the DUT. The MIU establishes asynchronous control between it and the DUT with the DUT as the master, and establishes control between it and the main controller with the main controller as the master.Type: GrantFiled: September 24, 2019Date of Patent: October 5, 2021Assignee: ADVANTEST CORPORATIONInventors: Shuichi Inage, Kazuhiro Iezumi, Tomoyuki Itakura, Keisuke Kusunoki, Yoshihiro Kato, Kazuhiro Tsujikawa, Naoya Kimura, Yuki Watanabe, Yuichiro Harada, Koji Miyauchi
-
Publication number: 20200225286Abstract: A test apparatus is configured to test a DUT that does not support synchronous control from an external circuit. A main controller is configured based on an architecture that tests a device by synchronous control with the main controller itself as the master. A MIU is configured as an interface between the main controller and the DUT. The MIU establishes asynchronous control between it and the DUT with the DUT as the master, and establishes control between it and the main controller with the main controller as the master.Type: ApplicationFiled: September 24, 2019Publication date: July 16, 2020Inventors: Shuichi INAGE, Kazuhiro IEZUMI, Tomoyuki ITAKURA, Keisuke KUSUNOKI, Yoshihiro KATO, Kazuhiro TSUJIKAWA, Naoya KIMURA, Yuki WATANABE, Yuichiro HARADA, Koji MIYAUCHI
-
Publication number: 20110284051Abstract: A photoelectric conversion cell includes a first electrode layer and a second electrode layer which are positioned apart from each other at an interval, a first semiconductor layer positioned on the first electrode layer and having a first conductivity type, a second semiconductor layer positioned on or above the first semiconductor layer and having a second conductivity type forming a p-n junction with the first semiconductor layer, a connecting part for electrically connecting the second semiconductor layer to the second electrode layer, and a linear electrode positioned on or above the second semiconductor layer and reaching a first end of the second semiconductor layer from the connecting part.Type: ApplicationFiled: January 26, 2010Publication date: November 24, 2011Applicant: KYOCERA CORPORATIONInventor: Koji Miyauchi
-
Publication number: 20100211674Abstract: A community generation support system and a community generation support method. A community generation support device (3) monitors public information stored in a web server (24). The community generation support device (3) detects a potential community on the basis of monitoring of information. The community generation support device (3) requests the web server (24) to generate a community space concerning the detected potential community. The web server (24) generates the community space. The community generation support device (3) transmits information on invitation for asking whether each potential community member wants to participate in the community to the user terminal (20) of the potential community member through the web server (24). The user terminal (20) transmits information on registration of participation to the community generation support device (3) through the web server (24). The user terminal (20) performs processing for making a user participate in the community.Type: ApplicationFiled: July 20, 2007Publication date: August 19, 2010Inventors: Taro Sugahara, Hiromi Oda, Hidenori Shimizu, Hiroyuki Shimizu, Koji Miyauchi, Qingjie Du
-
Patent number: 7707068Abstract: Trust values of n nodes are calculated by relating nodes having corresponding relations with arrows. Pij (i, j=1 to n) is assigned as a weight for an arrow from node ui to node uj on the basis of the relation between the nodes. P?=CPcP+(1?Cc) E is calculated, where Cc=constant, E=a predetermined matrix, pP=a matrix having elements at row i and column j represented by Pij. The trust value of each node is calculated on the basis of P?.Type: GrantFiled: October 29, 2004Date of Patent: April 27, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventor: Koji Miyauchi
-
Publication number: 20090024629Abstract: Access control appropriate to each processing node is achieved by evaluating information published by the processing node. An access control device (4) ranks subjects of consumption activities by their trust values, and determines whether or not the ranked subjects include any subject whose rank is improved from the last time. When there exists a subject whose rank is improved from the last time, a subject having data to which access control information is set against the subject with an improved rank is made a proposal that the protection level in the access control information against the subject with an improved rank should be decreased. The access control device (4) also judges whether or not the ranked subjects include any subject whose rank is worsened from the last time.Type: ApplicationFiled: July 15, 2008Publication date: January 22, 2009Inventor: Koji Miyauchi
-
Patent number: 7218847Abstract: A heating unit heats a work piece 6 by heat conduction from a heat conducting plate 4 on which light from a light source 1 is irradiated, wherein the heat conducting plate 4 comprises a holding member 2 having optical transparency, and a heat conducting layer 3 which is provided on a surface of the holding member 2, and absorbs light emitted from a light source 1 and is transmitted through the holding member 2, so as to generate heat. The heating unit has the heat conducting plate 4 in which deformation does not occur, and temperature thereof changes rapidly.Type: GrantFiled: October 22, 2004Date of Patent: May 15, 2007Assignee: Ushio Denki Kabushiki KasihaInventors: Yoichi Mizukawa, Koji Miyauchi
-
Patent number: 6897130Abstract: The present invention provides a method for thermal processing a semiconductor wafer wherein the semiconductor wafer is heat-treated by means of flash radiation means constituted by a flash discharge lamp after preheating the semiconductor wafer to a predetermined temperature by means of preheating means, the preheating is performed at a preheating temperature capable of controlling that the maximum tension of the semiconductor wafer when heated by the flash radiation means is to be less than the tense strength of the semiconductor wafer itself.Type: GrantFiled: December 13, 2002Date of Patent: May 24, 2005Assignee: Ushio Denki Kabushiki KaisyaInventors: Koji Miyauchi, Tatsushi Owada
-
Publication number: 20050096987Abstract: Trust values of n nodes are calculated by relating nodes having corresponding relations with arrows. Pij (i, j=1 to n) is assigned as a weight for an arrow from node ui to node uj on the basis of the relation between the nodes. P?=CPcP+(1?Cc) E is calculated, where Cc=constant, E=a predetermined matrix, pP=a matrix having elements at row i and column j represented by Pij. The trust value of each node is calculated on the basis of P?.Type: ApplicationFiled: October 29, 2004Publication date: May 5, 2005Inventor: Koji Miyauchi
-
Publication number: 20050089317Abstract: A heating unit for heating a work piece 6 by heat conduction from a heat conducting plate 4 on which light from a light source 1 is irradiated, wherein the heat conducting plate 4 comprises a holding member 2 having optical transparency, and a heat conducting layer 3 which is provided on a surface of the holding member 2, and absorbs light emitted from a light source 1 and transmits the holding member 2, so as to generate heat. The heating unit has the heat conducting plate 4 in which deformation does not occur, and temperature thereof changes rapidly.Type: ApplicationFiled: October 22, 2004Publication date: April 28, 2005Inventors: Yoichi Mizukawa, Koji Miyauchi
-
Publication number: 20030114019Abstract: The present invention provides a method for thermal processing a semiconductor wafer wherein the semiconductor wafer is heat-treated by means of flash radiation means constituted by a flash discharge lamp after preheating the semiconductor wafer to a predetermined temperature by means of preheating means, the preheating is performed at a preheating temperature capable of controlling that the maximum tension of the semiconductor wafer when heated by the flash radiation means is to be less than the tense strength of the semiconductor wafer itself.Type: ApplicationFiled: December 13, 2002Publication date: June 19, 2003Applicant: Ushio Denki Kabushiki KaisyaInventors: Koji Miyauchi, Tatsushi Owada
-
Patent number: 6054998Abstract: The document display system comprises a first character shape generator, a first display and a first transmitter in a first terminal device; and a first receiver, a second character shape generator and a second display in a second terminal device. The first character shape generator generates the character shapes of characters constituting at least part of a document. The character shapes are generated in response to skeleton information and in response to shape generation information that includes information representing a typeface. The first display displays the characters with the character shapes generated by the first character shape generator so that the at least part of the document is displayed set in the typeface. The first transmitter transmits character information indicating the skeleton information for each of the characters. The first receiver receives skeleton information for each of the characters.Type: GrantFiled: November 12, 1997Date of Patent: April 25, 2000Assignee: Hewlett-Packard CompanyInventor: Koji Miyauchi
-
Patent number: 5474963Abstract: A catalyst for dimerizing a lower .alpha.-olefin monomer with an enhanced selectivity comprises a carrier comprising at least one anhydrous potassium compound, preferably a mixture of potassium fluoride with potassium carbonate, and a carbon material; and a catalytic component carried on the carrier and comprising an alkali metal, preferably sodium metal, the catalyst preferably being compression molded into grains.Type: GrantFiled: April 5, 1994Date of Patent: December 12, 1995Assignee: Ube Industries, Ltd.Inventors: Kanji Nakagawa, Hiroshi Shimazaki, Makoto Matsuo, Koji Miyauchi, Toshikazu Machida