Abstract: Present invention relates to a recording apparatus and method, a recording medium, and a program which are intended to enhance the speed of recording. On the basis of erasure block information and cluster information obtained from a Memory Stick 31, the CPU 11 obtains the size of a data-block configured by clusters and, on the basis of the obtained data block size, adjusts the data block start position, thereby initializing the Memory Stick 31. In recording moving-picture data to the Memory Stick 31, the CPU 11 records the moving-picture data, in units of data blocks, to a data block of which clusters are all free. The present invention is applicable to camera-integrated video recorders or digital still cameras.

Abstract: Present invention relates to a recording apparatus and method, a recording medium, and a program which are intended to enhance the speed of recording. On the basis of erasure block information and cluster information obtained from a Memory Stick 31, the CPU 11 obtains the size of a data-block configured by clusters and, on the basis of the obtained data block size, adjusts the data block start position, thereby initializing the Memory Stick 31. In recording moving-picture data to the Memory Stick 31, the CPU 11 records the moving-picture data, in units of data blocks, to a data block of which clusters are all free. The present invention is applicable to camera-integrated video recorders or digital still cameras.

Abstract: An imaging apparatus can obtain a high quality still picture imaging signal in the all pixels read out mode and output it by means of an output processing means adapted to the interlaced read out mode. The imaging signal read out from a CCD image sensor 23 in the interlaced read out mode is directly supplied to a DV recording/reproducing processing section 4 by way of a camera signal processing circuit 24. The imaging signal read out from said CCD image sensor 23 in the apparatus is converted into an interlaced signal by a scan conversion section 3A, which is then supplied to the DV recording/reproducing processing section 4.

Abstract: A method of testing an electronic apparatus which eliminates a control signal line for setting an integrated circuit to a test mode and a test mode select terminal of an external terminal section and wherein fetching of test data and transfer of the thus fetched test data are performed in an integrated operation. In each of the integrated circuits, a boundary scan control circuit discriminates a category code at the top of data inputted from a serial input terminal to control a pair of switching circuits. When the category code represents a test mode, predetermined terminals of the switching circuits are selected so that input data are sent out to boundary scan cells. Fetching of parallel data from parallel input terminals and transfer to the boundary scan cells are performed at a time.