Abstract: A semiconductor memory device with a refresh mechanism having a plurality of memory cells integrated on a semiconductor substrate, a plurality of word lines and digit lines each connected to the memory cells, a refresh control circuit for successively selecting the word lines and refreshing the memory cells word line by word line in a refresh period and a time constant circuit connected to the word lines. The time constant circuit is activated whenever the word line connected to it is selected during an access period and emits a "refresh not required" signal until a predetermined time has elapsed. The refresh control circuit receives the "refresh not required" signal and then acts so as to skip the refreshing operation.