Abstract: A four-wheel drive vehicle includes: a drive-power distribution device for distributing a drive power from an engine to main and auxiliary drive wheels with a drive-power distribution ratio between the main drive wheels and auxiliary drive wheels; and a control apparatus for controlling an electric motor such that the drive-power distribution ratio becomes a target distribution ratio value, by setting an electric-current command value for driving an electric motor. The control apparatus is configured, in a drive-power transmitted state in which the drive power is transmitted to the drive-power distribution device, to execute a command-value reduction control operation for causing the electric motor to be driven with the electric-current command value being set to a value smaller than in a drive-power non-transmitted state in which the drive power is not being transmitted to the drive-power distribution device.

Abstract: A semiconductor memory device includes a substrate; a plurality of first conductive layers arranged in a first direction; a first semiconductor column; a first bit line being disposed at a position overlapping the first semiconductor column viewed in the first direction; a first wiring including a part overlapping the first bit line viewed in the first direction; and a second wiring including a part overlapping the first bit line viewed in the first direction. When a period in which a voltage of the first wiring transitions from a high to a low voltage state is assumed to be a first period, and when a period in which a voltage of the second wiring transitions from a low to a high voltage state is assumed to be a second period, at least a part of the second period overlaps at least a part of the first period.

Abstract: A semiconductor memory device includes a substrate; a plurality of first conductive layers arranged in a first direction; a first semiconductor column; a first bit line being disposed at a position overlapping the first semiconductor column viewed in the first direction; a first wiring including a part overlapping the first bit line viewed in the first direction; and a second wiring including a part overlapping the first bit line viewed in the first direction. When a period in which a voltage of the first wiring transitions from a high to a low voltage state is assumed to be a first period, and when a period in which a voltage of the second wiring transitions from a low to a high voltage state is assumed to be a second period, at least a part of the second period overlaps at least a part of the first period.

Abstract: To compensate for a decrease in reaction force of a bumper reinforcement, which is made of an aluminum alloy extrusion having two end portions subjected to bend forming and crushed portions on the respective end portions, against an impact load in end impact involved in crushing, and compensate for a decrease in energy absorption amount of the bumper reinforcement. Assuming a space between two flanges includes a first region from a center line of the thickness between the flanges to an outer flange and a second region from the center line to an inner flange in a cross section of the crushed portion perpendicular to an extrusion direction, area of the webs located in one (for example, the first region) of the two regions is larger than area of the webs located in the other region (for example, the second region).

Abstract: To compensate for a decrease in reaction force of a bumper reinforcement, which is made of an aluminum alloy extrusion having two end portions subjected to bend forming and crushed portions on the respective end portions, against an impact load in end impact involved in crushing, and compensate for a decrease in energy absorption amount of the bumper reinforcement. Assuming a space between two flanges includes a first region from a center line of the thickness between the flanges to an outer flange and a second region from the center line to an inner flange in a cross section of the crushed portion perpendicular to an extrusion direction, area of the webs located in one (for example, the first region) of the two regions is larger than area of the webs located in the other region (for example, the second region).

Abstract: In a pedal structure of an automotive vehicle which includes a brake pedal and an accelerator pedal which are provided at a vehicle body side by side in a vehicle width direction, the accelerator pedal comprises an accelerator pedal body to receive a pressing operation by a right foot, a hinge portion pivotally supporting a lower end of the accelerator pedal body, and a pedal base supporting the accelerator pedal body via the hinge portion, and a heel support portion to support the right foot's heel is provided at the pedal base. The heel support portion is positioned on a left side of and adjacently to the hinge portion and spaced apart forward from the hinge portion by a specified distance.

Abstract: According to one embodiment, a semiconductor storage device includes a memory cell array having memory cell capable of holding N-bit data; and a sense amplifier comprising a first latch holding information on a threshold distribution, a second latch holding write data, and a third latch holding lower information of the N-bit data, and supplying a first to a fourth voltages to the memory cell to write the data to the memory cell using the first to fourth voltages. The sense amplifier supplies the first to third voltages to the memory cell based on information in the second and the third latches, and based on a result of transfer of the information held by the first latch to the second latch, supplies the fourth voltage or the first voltage to the memory cell.

Abstract: The glass antenna of the present invention includes a first element connected to a hot-side feeding point, a second element connected to an earth-side feeding point and a coaxial cable having an inner conductor and an outer conductor that is connected to a part of a vehicle body. The glass antenna of the present can improve receiving sensitivity.

Abstract: In a pedal structure of an automotive vehicle which includes a brake pedal and an accelerator pedal which are provided at a vehicle body side by side in a vehicle width direction, the accelerator pedal comprises an accelerator pedal body to receive a pressing operation by a right foot, a hinge portion pivotally supporting a lower end of the accelerator pedal body, and a pedal base supporting the accelerator pedal body via the hinge portion, and a heel support portion to support the right foot's heel is provided at the pedal base. The heel support portion is positioned on a left side of and adjacently to the hinge portion and spaced apart forward from the hinge portion by a specified distance.

Abstract: According to one embodiment, a semiconductor storage device includes a memory cell array having memory cell capable of holding N-bit data; and a sense amplifier comprising a first latch holding information on a threshold distribution, a second latch holding write data, and a third latch holding lower information of the N-bit data, and supplying a first to a fourth voltages to the memory cell to write the data to the memory cell using the first to fourth voltages. The sense amplifier supplies the first to third voltages to the memory cell based on information in the second and the third latches, and based on a result of transfer of the information held by the first latch to the second latch, supplies the fourth voltage or the first voltage to the memory cell.

Abstract: According to one embodiment, a semiconductor memory device includes a first transistor, a detector, and a second transistor. The first transistor is capable of transferring a first voltage to a bit line. The detector reads data held by a memory cell connected to the bit line. The second transistor is capable of transferring a second voltage and a third voltage to the detector. The second voltage is generated by a source different from a source of the first voltage. The third voltage is larger than the second voltage. The second transistor charges the detector to one of the second voltage and the third voltage, while the first transistor transferring the first voltage to the bit line.

Abstract: A glass antenna includes a shared antenna conductor which meets a first frequency band and a second frequency band higher than the first frequency band and a feeding part connected to the shared antenna conductor. The shared antenna conductor includes a first element extended from the feeding part as a starting point and a second element extended from the first element as a starting point. At least a part of the first element and the second element configure a semi-loop form. When a wavelength in air in a central frequency of the second frequency band is ?02, a glass shortening coefficient of wavelength is k2 and ?g2=?02·k2, a conductor length of the first element is 0.65 ?g2 or higher and 1.0 ?g2 or lower, and the shortest distance between a defogger provided in window glass and the shared antenna conductor is 15 mm or longer.

Abstract: According to one embodiment, a non-volatile semiconductor memory device which is provided with a memory cell array, bit lines, word lines, and a sense amplifier circuit is presented. The memory cell array includes memory cells. The bit lines are electrically connected to the memory cells. The word lines are electrically connected to gates of the non-volatile memory cells. The sense amplifier circuit includes sense amplifiers which are electrically connected to the bit lines. Each of the sense amplifiers includes a latch circuit which is capable of holding data, and a detection circuit. The sense amplifiers are configured to apply any one of a first voltage and a second voltage higher than the first voltage to the bit lines respectively. The sense amplifiers apply any one of the first voltage and the second voltage s a third voltage to the bit lines, and apply the third voltage to the detection circuit.

Abstract: According to one embodiment, a non-volatile semiconductor memory device which is provided with a memory cell array, bit lines, word lines, and a sense amplifier circuit is presented. The memory cell array includes memory cells. The bit lines are electrically connected to the memory cells. The word lines are electrically connected to gates of the non-volatile memory cells. The sense amplifier circuit includes sense amplifiers which are electrically connected to the bit lines. Each of the sense amplifiers includes a latch circuit which is capable of holding data, and a detection circuit. The sense amplifiers are configured to apply any one of a first voltage and a second voltage higher than the first voltage to the bit lines respectively. The sense amplifiers apply any one of the first voltage and the second voltage s a third voltage to the bit lines, and apply the third voltage to the detection circuit.

Abstract: A first transistor can transfer a first voltage to a bit line. A latch circuit is electrically connected to a gate of the first transistor. A sensing portion is electrically connected to the bit line. A second transistor is connected to the sensing portion and the latch circuit. A third transistor is connected to the sensing portion and the bit line. A fourth transistor is connected to the second transistor and configured to transfer a first value corresponding to a voltage of the sensing node to the latch circuit. A first result is transferred as the first value to the latch circuit through the second and fourth transistor. The first result is obtained by turning on the third transistor for first and second periods. The first transistor transfers one of a ground potential and a second voltage to the bit line, as a voltage corresponding to the first result.

Abstract: According to one embodiment, a semiconductor memory storage apparatus includes an array, a sense amplifier, and a controller. The array includes a memory cell. The sense amplifier includes a first latch and a second latch. The first latch and the second latch are capable of storing a data read out from the memory cell. The controller performs a first operation, a second operation, and a third operation. In the first operation, the controller transfers an inverted data in the first latch to the first node and transfers the data in the second latch. In the second operation, the controller transfers the data in the first latch to the first node and transfers an inverted data in the second latch.

Abstract: According to one embodiment, a semiconductor memory device includes a first transistor, a detector, and a second transistor. The first transistor is capable of transferring a first voltage to a bit line. The detector reads data held by a memory cell connected to the bit line. The second transistor is capable of transferring a second voltage and a third voltage to the detector. The second voltage is generated by a source different from a source of the first voltage. The third voltage is larger than the second voltage. The second transistor charges the detector to one of the second voltage and the third voltage, while the first transistor transferring the first voltage to the bit line.

Abstract: A glass antenna for a vehicle that has a first element elongated in a first direction, a second element elongated in a second direction, a third element including first, second and third partial elements that are each elongated in specific directions, and a fourth element elongated in the second direction but detours the second element in the second direction.

Abstract: A glass antenna includes a shared antenna conductor which meets a first frequency band and a second frequency band higher than the first frequency band and a feeding part connected to the shared antenna conductor. The shared antenna conductor includes a first element extended from the feeding part as a starting point and a second element extended from the first element as a starting point. At least a part of the first element and the second element configure a semi-loop form. When a wavelength in air in a central frequency of the second frequency band is ?02, a glass shortening coefficient of wavelength is k2 and ?g2=?02·k2, a conductor length of the first element is 0.65 ?g2 or higher and 1.0 ?g2 or lower, and the shortest distance between a defogger provided in window glass and the shared antenna conductor is 15 mm or longer.

Abstract: A glass antenna for a vehicle on or in a window glass including a defogger having a plurality of heater wires that run in parallel, the glass antenna includes: an antenna conductor; a first feeding portion; and a second feeding portion adjacent to the first feeding portion, wherein: the antenna conductor includes a first antenna conductor, which extends clockwise with the first feeding portion as a starting point, and a second antenna conductor, which extends counterclockwise at the outside of the first antenna conductor with the second feeding portion as a starting point; and the second antenna conductor includes a first element extending between the first antenna conductor and the defogger.