Abstract: A charge and discharge signal circuit includes: high side transistors connected in series; low side transistors connected in series; high side drive circuits; low side drive circuits; and a drive signal generation circuit, wherein each drive circuit includes: a high side level shifter; a high side capacitor switch string of a capacitor and a switch element connected in series, being connected in parallel with the high side transistor; and a high side drive part, to which an output of the high side level shifter is supplied, and each of the low side drive circuits includes: a low side level shifter; a low side capacitor switch string of a capacitor and a switch element connected in series, being connected in parallel with the low side transistor; and a low side drive part, to which an output of the low side level shifter is supplied.

Abstract: A control circuit comprises a power supply unit configured to generate a voltage to be supplied to a load by turning on and off a first switch in response to a drive signal and control a drive current of the load by turning on and off a second switch in response to a control signal, a first controller configured to perform a first PWM control of the drive signal, based on a measurement value of the drive current, a second controller configured to perform a second PWM control of the control signal, based on an external signal, and a synchronous controller configured to synchronize an on-period of one period of the control signal to he a multiple of one period of the drive signal. Further, in the control circuit, during the on-period of the control signal, an inductor current for generating the drive current is cut off for a portion of every period of the drive signal.

Abstract: A charge and discharge signal circuit includes: high side transistors connected in series; low side transistors connected in series; high side drive circuits; low side drive circuits; and a drive signal generation circuit, wherein each drive circuit includes: a high side level shifter; a high side capacitor switch string of a capacitor and a switch element connected in series, being connected in parallel with the high side transistor; and a high side drive part, to which an output of the high side level shifter is supplied, and each of the low side drive circuits includes: a low side level shifter; a low side capacitor switch string of a capacitor and a switch element connected in series, being connected in parallel with the low side transistor; and a low side drive part, to which an output of the low side level shifter is supplied.

Abstract: An amplification circuit connected with a lowpass filter, which reduces the time required for compensating the amplification characteristic and starting up at turning on the power supply, and a control method thereof are provided. An amplification circuit 10, which operates in any one of the operation mode of ordinary operation mode MDN and special operation mode MDT, includes an amplifying section 20, a lowpass filter 30 connected to the amplifying section 20, and a lowpass filter setting section 40 that sets a cut-off frequency fc. In the case of an ordinary operation mode MDN, the cut-off frequency is set to an ordinary cut-off frequency fcn in which error in the output signal does not exceed an output allowable error as an allowable error, and in the case other than that, set to the side higher than the ordinary cut-off frequency fcn.

Abstract: An amplifier circuit which is connected to a sensor and variably sets an amplification property and a control method thereof are disclosed, the circuit having the capability of restricting the influence of change with time and temperature change. The amplifier circuit 1, which receives, as an input, a detection signal from the sensor and variably sets an amplification property, comprises: (1) a first reference value retaining unit 50 for retaining a first reference value K1 for setting an amplification property which makes an output signal be a specified detection reference output voltage when a reference input condition KJ is detected; (2) a correction signal generation unit 30 for generating a correction signal HS which reduces the difference between an amplification property actual measurement value and an amplification property set value; and (3) a first amplification property correction unit 40 for correcting the first reference value K1 based on the correction signal HS.

Abstract: This invention provides a comparator circuit which outputs a stable waveform without oscillation even if a gradient of a change of a comparison input signal is small and determines a magnitude of the comparison input signal within a predetermined threshold value regardless of the increase/decrease direction of the comparison input signal.

Abstract: Provided are two monitor circuits for monitoring two input signals of an input stage differential amplifier, respectively, and two monitor circuit for monitoring two output signals of the input stage differential amplifier, respectively. When failure occurs at the bridge circuit of a sensor element or at the input stage differential amplifier, the monitoring units or the monitoring units detect abnormality, which makes it possible to detect the failure of the sensor element or the input stage differential amplifier. Therefore it is possible to detect failure such as a disconnection or a short circuit of the bridge circuit of the sensor element and failure which has occurred at the amplifier for amplifying outputs of the sensor element.

Abstract: A circuit for detecting a difference in capacitance between a first capacitor and a second capacitor provided in a sensor includes an oscillator configured to generate an oscillating signal, a phase comparator coupled to the oscillator to output a signal responsive to a phase difference between the oscillating signal delayed by the first capacitor and the oscillating signal delayed by the second capacitor, an integration circuit coupled to the phase comparator to output an integrated signal made by integrating the signal responsive to the phase difference over a time period equal to a predetermined number of cycles of the oscillating signal, and a sample-and-hold circuit coupled to the integration circuit to output a signal made by sampling and holding the integrated signal at substantially an end of the time period.

Abstract: This invention provides a comparator circuit which outputs a stable waveform without oscillation even if a gradient of a change of a comparison input signal is small and determines a magnitude of the comparison input signal within a predetermined threshold value regardless of the increase/decrease direction of the comparison input signal.

Abstract: Provided are two monitor circuits for monitoring two input signals of an input stage differential amplifier, respectively, and two monitor circuit for monitoring two output signals of the input stage differential amplifier, respectively. When failure occurs at the bridge circuit of a sensor element or at the input stage differential amplifier, the monitoring units or the monitoring units detect abnormality, which makes it possible to detect the failure of the sensor element or the input stage differential amplifier. Therefore it is possible to detect failure such as a disconnection or a short circuit of the bridge circuit of the sensor element and failure which has occurred at the amplifier for amplifying outputs of the sensor element.

Abstract: A circuit for detecting a difference in capacitance between a first capacitor and a second capacitor provided in a sensor includes an oscillator configured to generate an oscillating signal, a phase comparator coupled to the oscillator to output a signal responsive to a phase difference between the oscillating signal delayed by the first capacitor and the oscillating signal delayed by the second capacitor, an integration circuit coupled to the phase comparator to output an integrated signal made by integrating the signal responsive to the phase difference over a time period equal to a predetermined number of cycles of the oscillating signal, and a sample-and-hold circuit coupled to the integration circuit to output a signal made by sampling and holding the integrated signal at substantially an end of the time period.

Abstract: A circuit for detecting a difference in capacitance between a first capacitor and a second capacitor provided in a sensor includes an oscillator configured to generate an oscillating signal, a phase comparator coupled to the oscillator to output a signal responsive to a phase difference between the oscillating signal delayed by the first capacitor and the oscillating signal delayed by the second capacitor, an integration circuit coupled to the phase comparator to output an integrated signal made by integrating the signal responsive to the phase difference over a time period equal to a predetermined number of cycles of the oscillating signal, and a sample-and-hold circuit coupled to the integration circuit to output a signal made by sampling and holding the integrated signal at substantially an end of the time period.

Abstract: An amplification circuit connected with a lowpass filter, which reduces the time required for compensating the amplification characteristic and starting up at turning on the power supply, and a control method thereof are provided. An amplification circuit 10, which operates in any one of the operation mode of ordinary operation mode MDN and special operation mode MDT, includes an amplifying section 20, a lowpass filter 30 connected to the amplifying section 20, and a lowpass filter setting section 40 that sets a cut-off frequency fc. In the case of an ordinary operation mode MDN, the cut-off frequency is set to an ordinary cut-off frequency fcn in which error in the output signal does not exceed an output allowable error as an allowable error, and in the case other than that, set to the side higher than the ordinary cut-off frequency fcn.

Abstract: An amplifier circuit which is connected to a sensor and variably sets an amplification property and a control method thereof are disclosed, the circuit having the capability of restricting the influence of change with time and temperature change. The amplifier circuit 1, which receives, as an input, a detection signal from the sensor and variably sets an amplification property, comprises: (1) a first reference value retaining unit 50 for retaining a first reference value K1 for setting an amplification property which makes an output signal be a specified detection reference output voltage when a reference input condition KJ is detected; (2) a correction signal generation unit 30 for generating a correction signal HS which reduces the difference between an amplification property actual measurement value and an amplification property set value; and (3) a first amplification property correction unit 40 for correcting the first reference value K1 based on the correction signal HS.

Abstract: A circuit for detecting a difference in capacitance between a first capacitor and a second capacitor provided in a sensor includes an oscillator configured to generate an oscillating signal, a phase comparator coupled to the oscillator to output a signal responsive to a phase difference between the oscillating signal delayed by the first capacitor and the oscillating signal delayed by the second capacitor, an integration circuit coupled to the phase comparator to output an integrated signal made by integrating the signal responsive to the phase difference over a time period equal to a predetermined number of cycles of the oscillating signal, and a sample-and-hold circuit coupled to the integration circuit to output a signal made by sampling and holding the integrated signal at substantially an end of the time period.

Abstract: A reset circuit for a PLL frequency synthesizer allows the PLL to quickly generate an output signal after waking up from a power-save mode. The reset circuit includes a delay circuit for receiving a shift signal and generating the output signal by delaying the shift signal for a predetermined time. A determination signal receives the shift signal and the output signal, determines whether they match, and generates a reset signal from the predetermined time when the shift signal is being shifted. A control circuit receives a power-save signal, which deactivates the PLL, and provides the delay circuit with a control signal for matching the output signal with the shift signal when the power-save signal is cancelled.

Abstract: A prescaler having a frequency division shifting circuit for shifting a frequency division ratio in response to a frequency division ratio shifting signal, and dividing an input signal in accordance with the shifted frequency division ratio to generate a first divisional signal. The prescaler also includes an extender circuit connected to a frequency division shifting circuit for dividing the frequency of the first divisional signal with a predetermined frequency division ratio to generate a second divisional signal. The extender circuit contains a synchronous counter.

Abstract: A modulation mixer includes a low cost circuit for reducing a carrier frequency leak. An orthogonal modulator including the modulation mixer may be formed on a single silicon substrate and does not need to be connected to an external transformer to suppress carrier frequency leak.