Patents by Inventor Koji Tani

Koji Tani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954416
    Abstract: A computer program causes a computer to execute processing of simulating behavior of an electromagnetic component including a coil at each of a plurality of time points based on an analytic model of the electromagnetic component. The processing comprises creating a look-up table storing a flux linkage of the coil, an inductance of the coil and a current in the coil that are obtained by a magnetic field analysis based on the analytic model in association with one another, and simulating behavior of the electromagnetic component by referring to the look-up table using currents in the coil calculated at a previous simulation step and at a step before the previous simulation step.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: April 9, 2024
    Assignee: JSOL Corporation
    Inventors: Takashi Yamada, Koji Tani
  • Publication number: 20210350048
    Abstract: A computer program causes a computer to execute processing of simulating behavior of an electromagnetic component including a coil at each of a plurality of time points based on an analytic model of the electromagnetic component. The processing comprises creating a look-up table storing a flux linkage of the coil, an inductance of the coil and a current in the coil that are obtained by a magnetic field analysis based on the analytic model in association with one another, and simulating behavior of the electromagnetic component by referring to the look-up table using currents in the coil calculated at a previous simulation step and at a step before the previous simulation step.
    Type: Application
    Filed: June 11, 2021
    Publication date: November 11, 2021
    Inventors: Takashi Yamada, Koji Tani
  • Patent number: 11074378
    Abstract: A computer program causes a computer to execute processing of simulating behavior of an electromagnetic component including a coil at each of a plurality of time points based on an analytic model of the electromagnetic component. The processing comprises creating a look-up table storing a flux linkage of the coil, an inductance of the coil and a current in the coil that are obtained by a magnetic field analysis based on the analytic model in association with one another, and simulating behavior of the electromagnetic component by referring to the look-up table using currents in the coil calculated at a previous simulation step and at a step before the previous simulation step.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: July 27, 2021
    Assignee: JSOL Corporation
    Inventors: Takashi Yamada, Koji Tani
  • Patent number: 7394463
    Abstract: Based on rectangular element data constituting a boundary surface that separates a rotating machine into a stator-side portion and a rotor-side portion, and polygonal or polyhedral element data constituting the stator-side portion and the rotor-side portion excluding the boundary surface, tetrahedral elements including nodes of each of the stator-side portion and the rotor-side portion are created, a node is created at an arbitrary distance from the gravity of the rectangular element in a normal direction for each of the rectangular elements on the boundary surface, mesh division is performed for the tetrahedral elements based on the node at the arbitrary distance and nodes on the boundary surface, and mesh division is further performed based on nodes of the stator and the rotor.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: July 1, 2008
    Assignee: The Japan Research Institute, Limited
    Inventor: Koji Tani
  • Publication number: 20060033734
    Abstract: Based on rectangular element data constituting a boundary surface that separates a rotating machine into a stator-side portion and a rotor-side portion, and polygonal or polyhedral element data constituting the stator-side portion and the rotor-side portion excluding the boundary surface, tetrahedral elements including nodes of each of the stator-side portion and the rotor-side portion are created, a node is created at an arbitrary distance from the gravity of the rectangular element in a normal direction for each of the rectangular elements on the boundary surface, mesh division is performed for the tetrahedral elements based on the node at the arbitrary distance and nodes on the boundary surface, and mesh division is further performed based on nodes of the stator and the rotor.
    Type: Application
    Filed: November 29, 2002
    Publication date: February 16, 2006
    Inventor: Koji Tani
  • Patent number: 6996511
    Abstract: A two-dimensional mesh is generated on a plane perpendicular to the rotation axis. At this time, a ring-shaped gap is provided between the rotor and the stator, and portions facing the ring-shaped gap are equally divided into the same number of parts. An initial three-dimensional mesh is generated by joining together a plurality of two-dimensional meshes in the direction of the rotation axis while rotating the two-dimensional meshes. A boundary surface is formed in a cylindrical gap composed of a stack of the ring-shaped gaps, and a three-dimensional mesh is generated by filling the cylindrical gap with a plurality of polyhedrons, including polyhedrons comprising each of surface elements constituting the stator-side mesh surface, rotor-side mesh surface and boundary surface as one face.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: February 7, 2006
    Assignee: The Japan Research Institute, Limited
    Inventors: Koji Tani, Tetsuo Ogawa
  • Patent number: 6913970
    Abstract: A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: July 5, 2005
    Assignee: Fujitsu Limited
    Inventors: Kenichi Inoue, Yoshinori Obata, Takeyasu Saito, Kaoru Saigoh, Naoya Sashida, Koji Tani, Jirou Miura, Tatsuya Yokota, Satoru Mihara, Yukinobu Hikosaka, Yasutaka Ozaki
  • Publication number: 20050055183
    Abstract: A two-dimensional mesh is generated on a plane perpendicular to the rotation axis. At this time, a ring-shaped gap is provided between the rotor and the stator, and portions facing the ring-shaped gap are equally divided into the same number of parts. An initial three-dimensional mesh is generated by joining together a plurality of two-dimensional meshes in the direction of the rotation axis while rotating the two-dimensional meshes. A boundary surface is formed in a cylindrical gap composed of a stack of the ring-shaped gaps, and a three-dimensional mesh is generated by filling the cylindrical gap with a plurality of polyhedrons, including polyhedrons comprising each of surface elements constituting the stator-side mesh surface, rotor-side mesh surface and boundary surface as one face.
    Type: Application
    Filed: September 6, 2002
    Publication date: March 10, 2005
    Inventors: Koji Tani, Tetsuo Ogawa
  • Publication number: 20030080364
    Abstract: There are provided the steps of forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 1, 2003
    Applicant: Fujitsu Limited
    Inventors: Kenichi Inoue, Yoshinori Obata, Takeyasu Saito, Kaoru Saigoh, Naoya Sashida, Koji Tani, Jirou Miura, Tatsuya Yokota, Satoru Mihara, Yukinobu Hikosaka, Yasutaka Ozaki
  • Patent number: 6533948
    Abstract: A reaction byproduct which is generated when a ferro-dielectric material film is etched is removed without giving adverse effect on the semiconductor element. After the etching of the ferro-dielectric material film, a wetting process may performed using an aqueous solution of phosphoric acid. After the ferro-dielectric material film is etched using the resist as the mask, the wetting process is also performed using the aqueous solution of phosphoric acid before and after the ashing of resist.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: March 18, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kato, Koji Tani, Takanori Hashimoto
  • Patent number: 6509593
    Abstract: A semiconductor device formed by forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: January 21, 2003
    Assignee: Fujitsu Limited
    Inventors: Kenichi Inoue, Yoshinori Obata, Takeyasu Saito, Kaoru Saigoh, Naoya Sashida, Koji Tani, Jirou Miura, Tatsuya Yokota, Satoru Mihara, Yukinobu Hikosaka, Yasutaka Ozaki
  • Publication number: 20020011616
    Abstract: There are provided the steps of forming contact holes in the insulating film, that covers the source/drain of the MOSFET and the capacitor in the memory cell region, on the lower electrode of the capacitor by the same steps, then filling the plugs into the contact holes, and then forming the contact hole on the upper electrode of the capacitor. Accordingly, there can be provided the semiconductor device having the ferroelectric capacitor, capable of simplifying respective wiring connection structures to the upper electrode and the lower electrode of the capacitor by suppressing the damage to the capacitor formed over the transistor.
    Type: Application
    Filed: December 29, 2000
    Publication date: January 31, 2002
    Applicant: Fujitsu Limited
    Inventors: Kenichi Inoue, Yoshinori Obata, Takeyasu Saito, Kaoru Saigoh, Naoya Sashida, Koji Tani, Jirou Miura, Tatsuya Yokota, Satoru Mihara, Yukinobu Hikosaka, Yasutaka Ozaki
  • Publication number: 20010017285
    Abstract: A reaction byproduct which is generated when a ferro-dielectric material film is etched is removed without giving adverse effect on the semiconductor element. After the etching of the ferro-dielectric material film, a wetting process may performed using an aqueous solution of phosphoric acid. After the ferro-dielectric material film is etched using the resist as the mask, the wetting process is also performed using the aqueous solution of phosphoric acid before and after the ashing of resist.
    Type: Application
    Filed: February 23, 2001
    Publication date: August 30, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Yoshikazu Kato, Koji Tani, Takanori Hashimoto
  • Patent number: 5468993
    Abstract: A semiconductor device includes a rectangular semiconductor chip bonded to a die pad of a lead frame in which a plurality of leads are arranged around the die pad. An area where the semiconductor ship is electrically connected with the leads around the semiconductor chip and the semiconductor chip are sealed with a resin. A distance between the semiconductor chip and a peripheral wall of the die pad is larger at a central portion of each side of the chip than at each corner of the chip. The leads are arranged such that a line connecting all lead ends is substantially parallel with the peripheral wall of the die pad.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: November 21, 1995
    Assignee: Rohm Co., Ltd.
    Inventor: Koji Tani
  • Patent number: 5060531
    Abstract: One of male and female rotor elements is coated with a coating which is different in hardness from the other uncoated element. Even when the rotor elements come to contact with each other during the operation due to thermal expansion or the like, because of the difference in hardness between the coating and the other uncoated element, either of them which has a less degree of hardness is scraped off. As a result, accident due to contact between the male and female rotor elements can be prevented and the screw rotor can be operated with an optimum clearance between the elements.
    Type: Grant
    Filed: December 18, 1989
    Date of Patent: October 29, 1991
    Assignee: Ishikawajima-Harima Jukogyo Kabushiki Kaisha
    Inventors: Yuichi Iguchi, Koji Tani