Patents by Inventor Koji Tezuka

Koji Tezuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12121390
    Abstract: A control system includes a radiation emission apparatus and a radiographic imaging apparatus that generates image data by receiving radiation. A first apparatus of the radiation emission apparatus and the radiographic imaging apparatus includes a first timer that performs time measurement to periodically generate first time measurement information. A second apparatus of the radiation emission apparatus and the radiographic imaging apparatus includes a second timer that performs time measurement to periodically generate second time measurement information. The first apparatus includes an interface that transmits the first time measurement information to the second timer. At least one apparatus includes a hardware processor which adjusts the operation of the first or second timer based on adjustment conditions in a state where the second timer does not acquire the first time measurement information.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: October 22, 2024
    Assignee: Konica Minolta, Inc.
    Inventors: Kohei Isogai, Hidetake Tezuka, Nobuyuki Miyake, Kentaro Hara, Masahiro Kuwata, Koji Kashima
  • Patent number: 10195521
    Abstract: An information processing apparatus erases, on the basis of a chained state of a plurality of pieces arranged on a game field, the pieces in the chained state. The arrangement of the pieces in the game field is controlled such that, in a predetermined region on the game field, an odd number of pieces and an even number of pieces are alternately arranged on imaginary lines in an advancing direction on the game field. For example, the information processing apparatus erases a serial piece group formed as a chain by determining, starting from operation for any one piece on the imaginary line corresponding to a frontmost row among the imaginary lines, whether a piece of a same kind as the one piece is present in left and right pieces adjacent to the one piece present on a next imaginary line in the advancing direction from the operated one piece.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: February 5, 2019
    Assignees: Akatsuki Inc., BANDAI NAMCO Entertainment Inc.
    Inventors: Genki Shiota, Koji Tezuka, Kunio Hashimoto, Ken Kanai, Shohei Sekii
  • Patent number: 10052559
    Abstract: A game system causes an enemy character that is caused to battle with a player character to appear by implementing a first lottery, and implements a battle between the enemy character that has been caused to appear and the player character. After the battle has started, when a player has performed an operation input that selects one item among a plurality of types of items for acquiring the enemy character, the game system implements a second lottery based on the win probability that corresponds to the type of the selected item and gives the enemy character with which the player character has battled to the player when the player has won the second lottery.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: August 21, 2018
    Assignee: BANDAI NAMCO Entertainment Inc.
    Inventor: Koji Tezuka
  • Patent number: 9744443
    Abstract: A server is connected to a terminal via a network, and manages registration of game information, the terminal performing a first game process that utilizes stored game information, and a second game process that utilizes registered game information.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: August 29, 2017
    Assignee: BANDAI NAMCO ENTERTAINMENT INC.
    Inventors: Koji Tezuka, Masaki Ota, Kentaro Honma
  • Publication number: 20160214014
    Abstract: An information processing apparatus erases, on the basis of a chained state of a plurality of pieces arranged on a game field, the pieces in the chained state. The arrangement of the pieces in the game field is controlled such that, in a predetermined region on the game field, an odd number of pieces and an even number of pieces are alternately arranged on imaginary lines in an advancing direction on the game field. For example, the information processing apparatus erases a serial piece group formed as a chain by determining, starting from operation for any one piece on the imaginary line corresponding to a frontmost row among the imaginary lines, whether a piece of a same kind as the one piece is present in left and right pieces adjacent to the one piece present on a next imaginary line in the advancing direction from the operated one piece.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 28, 2016
    Inventors: Genki SHIOTA, Koji TEZUKA, Kunio HASHIMOTO, Ken KANAI, Shohei SEKII
  • Publication number: 20150336003
    Abstract: A game system causes an enemy character that is caused to battle with a player character to appear by implementing a first lottery, and implements a battle between the enemy character that has been caused to appear and the player character. After the battle has started, when a player has performed an operation input that selects one item among a plurality of types of items for acquiring the enemy character, the game system implements a second lottery based on the win probability that corresponds to the type of the selected item and gives the enemy character with which the player character has battled to the player when the player has won the second lottery.
    Type: Application
    Filed: March 17, 2015
    Publication date: November 26, 2015
    Inventor: Koji TEZUKA
  • Publication number: 20140113728
    Abstract: A server is connected to a terminal via a network, and manages registration of game information, the terminal performing a first game process that utilizes stored game information, and a second game process that utilizes registered game information.
    Type: Application
    Filed: April 11, 2012
    Publication date: April 24, 2014
    Applicant: NAMCO BANDAI GAMES INC.
    Inventors: Koji Tezuka, Masaki Ota, Kentaro Honma
  • Patent number: 8559166
    Abstract: A solid electrolytic capacitor includes a capacitor element, an anode lead frame, a cathode lead frame, and a mold resin portion. The anode lead frame includes an anode terminal portion and a rising portion, and the anode terminal portion is exposed at the bottom surface of the mold resin portion. The rising portion is formed integral with the anode terminal portion, and rises to the anode portion. In the rising portion, a through hole is formed. The cathode lead frame includes a cathode terminal portion, a pair of side surface portions and a step portion. Thus, a solid electrolytic capacitor allowing highly accurate and reliable attachment of the capacitor element to the lead frame without using any additional member is provided.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: October 15, 2013
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Keiko Matsuoka, Shoji Umeda, Yoshiyuki Fushimi, Koji Tezuka
  • Patent number: 8325466
    Abstract: A solid electrolytic capacitor includes a capacitor element from which an anode lead projects forward and having a surface on which a cathode layer is formed, an exterior resin covering the capacitor element, and anode and cathode terminals including, respectively, an anode and cathode terminal surfaces which are exposed from a bottom surface of the exterior resin. The anode terminal is formed from one metal plate, and includes a terminal part forming the anode terminal surface, a folded part folded back at a side edge of the terminal part and arranged over a top surface of the terminal part, and an upright part bent vertically to the top surface of the terminal part at a front edge or a rear edge of a tip end part of the folded part. A tip end part of the anode lead is electrically connected to a tip end of the upright part.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: December 4, 2012
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Eizo Fujii, Kazuhiro Kato, Hiroya Nishimoto, Shoji Umeda, Koji Tezuka
  • Patent number: 8081421
    Abstract: A solid electrolytic capacitor includes a capacitor element, an anode lead frame, a cathode lead frame, and a mold resin portion. The anode lead frame includes an anode terminal portion and a rising portion, and the anode terminal portion is exposed at the bottom surface of the mold resin portion. The rising portion is formed integral with the anode terminal portion, and rises to the anode portion. In the rising portion, a through hole is formed. The cathode lead frame includes a cathode terminal portion, a pair of side surface portions and a step portion. Thus, a solid electrolytic capacitor allowing highly accurate and reliable attachment of the capacitor element to the lead frame without using any additional member is provided.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: December 20, 2011
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Keiko Matsuoka, Shoji Umeda, Yoshiyuki Fushimi, Koji Tezuka
  • Publication number: 20110249375
    Abstract: A solid electrolytic capacitor includes a capacitor element, an anode lead frame, a cathode lead frame, and a mold resin portion. The anode lead frame includes an anode terminal portion and a rising portion, and the anode terminal portion is exposed at the bottom surface of the mold resin portion. The rising portion is formed integral with the anode terminal portion, and rises to the anode portion. In the rising portion, a through hole is formed. The cathode lead frame includes a cathode terminal portion, a pair of side surface portions and a step portion. Thus, a solid electrolytic capacitor allowing highly accurate and reliable attachment of the capacitor element to the lead frame without using any additional member is provided.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Keiko MATSUOKA, Shoji UMEDA, Yoshiyuki FUSHIMI, Koji TEZUKA
  • Patent number: 7990685
    Abstract: A solid electrolytic capacitor includes a capacitor element, an anode lead frame, a cathode lead frame, and a mold resin portion. The anode lead frame includes an anode terminal portion and a rising portion, and the anode terminal portion is exposed at the bottom surface of the mold resin portion. The rising portion is formed integral with the anode terminal portion, and rises to the anode portion. In the rising portion, a through hole is formed. The cathode lead frame includes a cathode terminal portion, a pair of side surface portions and a step portion. Thus, a solid electrolytic capacitor allowing highly accurate and reliable attachment of the capacitor element to the lead frame without using any additional member is provided.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: August 2, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Keiko Matsuoka, Shoji Umeda, Yoshiyuki Fushimi, Koji Tezuka
  • Publication number: 20100103591
    Abstract: A solid electrolytic capacitor comprises a capacitor element from which an anode lead projects forward and having a surface on which a cathode layer is formed, an exterior resin covering the capacitor element, and anode and cathode terminals including, respectively, an anode and cathode terminal surfaces which are exposed from a bottom surface of the exterior resin. The anode terminal is formed from one metal plate, and comprises a terminal part forming the anode terminal surface, a folded part folded back at a side edge of the terminal part and arranged over a top surface of the terminal part, and an upright part bent vertically to the top surface of the terminal part at a front edge or a rear edge of a tip end part of the folded part. A tip end part of the anode lead is electrically connected to a tip end of the upright part.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 29, 2010
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Eizo Fujii, Kazuhiro Kato, Hiroya Nishimoto, Shoji Umeda, Koji Tezuka
  • Publication number: 20090147449
    Abstract: A solid electrolytic capacitor includes a capacitor element, an anode lead frame, a cathode lead frame, and a mold resin portion. The anode lead frame includes an anode terminal portion and a rising portion, and the anode terminal portion is exposed at the bottom surface of the mold resin portion. The rising portion is formed integral with the anode terminal portion, and rises to the anode portion. In the rising portion, a through hole is formed. The cathode lead frame includes a cathode terminal portion, a pair of side surface portions and a step portion. Thus, a solid electrolytic capacitor allowing highly accurate and reliable attachment of the capacitor element to the lead frame without using any additional member is provided.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 11, 2009
    Applicant: SANYO Electric Co., Ltd.
    Inventors: Keiko MATSUOKA, Shoji UMEDA, Yoshiyuki FUSHIMI, Koji TEZUKA
  • Publication number: 20070142976
    Abstract: According to one embodiment, there is provided an electronic apparatus including: a main body configured to be used in a first mode and a second mode; a fan installed in the main body; a control section that controls the fan on the basis of a detected acceleration of the main body, the detected temperature inside of the main body, and the selected mode. The control section includes: a storage that stores a first setting for controlling the fan in a first temperature range and a second setting for controlling the fan in a second temperature range that includes a temperature range lower than the first temperature range; and a setting select section that selects one setting among the first and second setting.
    Type: Application
    Filed: December 18, 2006
    Publication date: June 21, 2007
    Inventor: Koji Tezuka
  • Patent number: 7010615
    Abstract: Disclosed is a communication network management system for converting action parameters contained in abstract requirements (abstract policy information) regarding a network to parameters conforming to the network technology (ATM, SDH, WDM, etc.) and type of network element to be set, and setting these parameters in the element. Specifically, a policy administration portion converts action parameters contained in abstract policy information to parameters dependent upon network technology and a policy enforcement portion converts the parameters obtained by this conversion to parameters dependent upon type of network element to be set and sets these parameters in the element.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: March 7, 2006
    Assignee: Fujitsu Limited
    Inventors: Koji Tezuka, Takao Ogura, Kohei Iseda
  • Publication number: 20030154317
    Abstract: A CPU which performs video processing, and a network processor which performs network processing share a PCI bus. Video data is transmitted to a wireless LAN via the PCI bus.
    Type: Application
    Filed: January 29, 2003
    Publication date: August 14, 2003
    Inventors: Yasuhiro Ishibashi, Koji Tezuka
  • Publication number: 20030074359
    Abstract: A network management unit which builds and updates a network management model automatically and flexibly in accordance with changes made to the network of interest, so that network engineers can perform network management tasks more easily and efficiently. A network element information manager collects and manages network element information, including inner layer structure of each device constituting a network. A scenario manager manages scenarios for use in building a network management model. When a network construction request is received, a network management model builder builds or updates a network management model automatically, consulting the network element information in conjunction with an appropriate scenario retrieved from the scenario manager. The resultant network management model is saved in a network management model database.
    Type: Application
    Filed: February 26, 2002
    Publication date: April 17, 2003
    Inventor: Koji Tezuka
  • Patent number: 6084882
    Abstract: A detour path determination method wherein each node on a determined detour path stores in advance first and second nodes upstream of each node as well as an identifier(s) of a packet directional path(s); a number of an identifier(s) of a packet directional path(s) required for switching in each link extending from a downstream node one node downstream of each node on the detour path are set for respective nodes on the detour path beginning from the terminal node upstream; the identifier(s) of the packet directional path(s) set as above, and an identifier(s) of a corresponding packet directional path(s) at a start node of the detour path, are sent to a node one node upstream of the above each node; the start node updates a identification data table at the node, by an identifier(s) of a packet directional path(s) set downstream of the start node based on the corresponding identifier(s) of packet directional path(s) at a start node of the detour path, when the start node receives the above identifier(s) (FIG.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: July 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Takao Ogura, Shigeo Amemiya, Koji Tezuka, Takafumi Chujo
  • Patent number: 5636206
    Abstract: An alarm masking system is provided which is capable of implementing alarm priority processing or alarm inhibit processing in ATM transmission equipment. In ATM transmission equipment, a received virtual path or virtual channel is switched by means of a switching unit and then sent to an interface unit. In doing this, if a higher priority alarm is detected or received at a reception side interface unit, an intra-office tag is added to the alarm cell and then it is output, so that by detecting this intra-office tag it is possible to inhibit generation of lower priority alarms in response to the higher order alarm.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: June 3, 1997
    Assignee: Fujitsu Limited
    Inventors: Shigeo Amemiya, Yuichi Matsuda, Takao Ogura, Yasuki Fujii, Koji Tezuka, Hiromi Ueda, Hitoshi Uematsu